... Chandrakasan ISBN 978-0-387 -25 737 -2, 20 05 Statistical Analysis and Optimization for VLSI: Timing and Power Ashish Srivastava, Dennis Sylvester, and David Blaauw ISBN 978-0-387 -26 049-9, 20 05 ... 134, 24 9 active sleep, 26 0 bias generator, 26 2 passive sleep, 26 1 read assist, 25 7 reliability, 26 7 replica path, 25 8 soft errors, 26 7 subthreshold, 107 timing, 25 7 write assist, 25 3 ... bundled data, 23 0 dual-rail, 23 1 Asynchronous latch controller, 24 0 Body-bias, 2, 12, 20 adaptive, 4, 25 , 45, 77 controller, 88 forward, 27 , 60 reverse, 27 , 55 Canary circuits, 179...