Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Design Technologies Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Views / Abstractions / Hierarchies D.Gajski, Silicon Compilation, Addison Wesley, 1988 Architectural Logic Circuit Behavioral Structural Physical device Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction N-Channel Enhancement mode MOS FET – Four Terminal Device - substrate bias – The “self aligned gate” - key to CMOS The MOS Transistor n+n+ p-substrate Field-Oxyde (SiO 2 ) p+ stopper Polysilicon Gate Oxyde Drain Source Gate Bulk Contact CROSS-SECTION of NMOS Transistor Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction MOS transistors Types and Symbols D S G D S G G S D D S G NMOS Enhancement NMOS PMOS Depletion Enhancement B NMOS with Bulk Contact Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction The Basic Idea… » Voltage on the Gate controls the current through the source/drain path » N-Channel - N-Switches are ON when the Gate is HIGH and OFF when the Gate is LOW » P-Channel - P-Switches are OFF when the Gate is HIGH and ON when the Gate is LOW » (ON == Circuit between Source and Drain) Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Transistors as Switches G S D G S D N Switch P Switch 0 1 1 0 Passes “good zeros” Passes “good ones” Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction ….The Rest of the Story . » Put them in series - both must be on to complete the circuit » Put them in parallel - either can be on to complete the circuit » Generate all sorts of Switching Functions » NOT the same as Boolean Functions Its RELAY logic - pin ball machines Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Series Parallel Structures N Channel: on=closed when gate is high 1 1 1 1 G G G G S S S S D D D D NMOS Transistors in Series/Parallel Connection Transistors can be thought as a switch controlled by its gate signal NMOS switch closes when switch control input is high X Y A B Y = X if A and B X Y A B Y = X if A OR B NMOS Transistors pass a “strong” 0 but a “weak” 1 Digital Integrated Circuits © Prentice Hall 1995 Introduction Introduction [...]... 1995 Magic Layout of Inverter Introduction to VLSI Design Introduction © Steven P Levitan 1998 Magic “Palette” of Layers Introduction to VLSI Design Introduction © Steven P Levitan 1998 Modern Interconnect Chain of Inverters A B C D E Feedback loop Introduction to VLSI Design Introduction © Steven P Levitan 1998 Which is which? A Introduction to VLSI Design B C Introduction D E © Steven P Levitan 1998... VLSI Design 0/1 Introduction © Steven P Levitan 1998 …That’s it! This is Non-Trivial: it defines the basis for the logic abstraction which is essential for all Boolean functions » Provide a path to VDD for 1 » Provide a path to GND for 0 » For complex functions - provide complex paths Introduction to VLSI Design Introduction © Steven P Levitan 1998 Four Views Logic Transistor Introduction to VLSI Design. .. Switch Introduction to VLSI Design 0 1 Open Circuit, High Z Passes “good ones” Bi-directional Switch Introduction © Steven P Levitan 1998 From Switches to Boolean Functions Use the Switching Functions to provide paths to Vdd or GND » Vdd is the source of all Truth (Vdd = = 1) » GND is the source of all Falsehood (GND == 0) P-channel N-channel 0 0 1 1 Introduction to VLSI Design Introduction © Steven... structures Introduction to VLSI Design Introduction © Steven P Levitan 1998 Complementary Structures » Big 2 x N transistors for N inputs – Use the “dual” for N and P chains – Can/should be sized for maximum speed/minimum power-area » Can use well known circuit minimization techniques – Fast – Low static power dissipation – Possibly high dynamic power dissipation Introduction to VLSI Design Introduction ©...Series Parallel Structures(2) D 0 0 G S D G 0 D G S D S G 0 S P Channel: on=closed when gate is low Introduction to VLSI Design Introduction © Steven P Levitan 1998 PMOS Transistors in Series/Parallel Connection PMOS switch closes when switch control input is low A B X Y Y = X if A AND B = A + B A X B Y Y = X if A OR B = . Introduction to VLSI Design © Steven P. Levitan 1998 Introduction Introduction Design Technologies Introduction to VLSI Design © Steven P. Levitan. VLSI Design © Steven P. Levitan 1998 Introduction Introduction The Inverter  True to False / False to True Converter 1/0 0/1 Introduction to VLSI Design