Chapter Parallel Data Input/Output Although the programs described in Chapter use the memory and CPU registers only, this chapter explains how to input and output parallel data Among various data input and output, those of parallel data are the simplest and have a wide variety of uses They are used for general purposes such as inputting signals from various sensors and turning lamps or heaters on/off 8.1 Parallel Data Input/Output In a microcomputer-applied system, you may want to know the on/off statuses of some switches or display the current statuses using LEDs or others Such simultaneous input/output of several-bit data is referred to as parallel data input/output and the peripheral functions for parallel data input/output are called "I/O ports", which have registers and pins as shown in Figure 8.1 Figure 8.1: Parallel Data Input/Output Parallel data input/output using I/O ports are performed through registers as shown in Figure 8.2 http://resource.renesas.com Page 103 Figure 8.2: Parallel Data Input/Output Method Input function "1" can be read from I/O port registers when the "High" voltage is applied to I/O port pins or "0" when "Low" Based on the values read from I/O port registers, the on/off statuses of the switches connected to pins or the high/low status of the comparator output can be determined Output function The "Low" voltage is output from I/O port pins when the values written in I/O port registers are "0" or "High" when "1" Based on the values written in I/O port registers, the LEDs connected to pins or relays can be turned on and off 8.2 Port Configuration The H8/3048 has ports to B as I/O ports available for parallel data input/output Port is for input only These ports have data direction registers (DDRs) and data registers (DRs) as shown in Table 8.1 The H8/3048 employs the memory-mapped I/O method for data input/output This method has no dedicated data input/output instructions such as "data input instructions" or "data output instructions" and instructions for writing/reading to/from the memory are also used for data input/output For data input/output functions (various registers), addresses are allocated as with the memory In the case of the H8/3048, the H'FFFF10 to H'FFFFFF addresses are used for data input/output functions (various registers) Accordingly, the MOV and bit handling instructions can be used as they are and reading/writing from/to addresses between H'FFFF10 and H'FFFFFF are regarded as being data input/output In I/O ports, data are output from pins by writing them in the DR of each port and the statuses of pins can be input by reading data from the DR http://resource.renesas.com Page 104 Table 8.1: I/O Port Register Map Figure 8.3 shows the I/O port block diagram Figure 8.3: I/O Port Block Diagram Depending on the DDR setting, the I/O port pins can be used for either input or output Write "1" in the DDR of the target bit to use the corresponding pin for output or "0" for input Since the DDR is a write-only register, the setting cannot be read even if the MOV instruction is used If an instruction for reading is executed by mistake, "1" is always read irrespective of the setting http://resource.renesas.com Page 105 In the DR, a flip-flop function is provided for the output only Output data once written is kept (output) until the next data is written During data input, on the contrary, the voltage signal being input to a pin is read as it is, not the data written in the DR output flip-flop Precautions on connecting external equipment to I/O ports The DDR of each port is set to "0" (input) without modification after resetting and the pin is in "High-Z" (high impedance) state Since the DR is also set to "0" by default, setting the DDR to "1" without modifying the DR changes the pin to "Low" For circuits like the TTL, the "High-Z" state of the input is the same as the "High" input If a TTL is connected to a port and equipment operating when output from the port is "High" is externally connected, some operation will be performed between the time immediately after resetting and until the port is changed to output To prevent this abnormal operation, develop a circuit so as to operate when output from a port is "Low" and set the DR to "1" before setting the DDR to output Since this setting changes the pin from "High-Z" to "High", no abnormal operation occurs after resetting, keeping external equipment stopped 8.3 How to Use Ports 8.3.1 Sample Port Output Figure 8.4 shows an example to set port A to output to control LEDs on/off Figure 8.4: Control of LEDs On/Off In a pin set to output by the DDR, the voltage varies with the contents of the DR When LEDs are turned on using port A as shown in Figure 8.4, write "1" in the corresponding bit of the PADDR to set the corresponding pin of port A to output To turn the LEDs on, write "0" in the corresponding bit of http://resource.renesas.com Page 106 the PADR, or "1" to turn them off To turn only LED1 on, write B'00000010 (H'02) in the PADR For the bits set to input (bits to which no LED is connected), writing data in the DR will not output voltage to the pin If you attempt to read data from the DR, the pin voltage, not the written value, is read As a result, writing is invalid, not affecting the pin LEDs are turned on when a current (IF) of about 10mA is circulated forward of the diodes At this time, a forward voltage (VF) of about 2V is required Since the port A pin of the H8/3048 will not supply enough current to drive the LEDs directly, the HD74AC series' CMOS circuit is connected to drive them The HD74AC family is capable of supplying a 24mA current with either "High" or "Low" output In addition, 4V can be reserved from the "High" voltage (VOH) at this time to drive the LEDs Resistance is inserted to prevent a current of over 10mA from flowing into the LEDs The resistance to be inserted is obtained as follows: Resistance [Ohm] ³ (4V - 2V)/10mA Port A for turning LEDs on and off using this circuit is initialized as follows: ; Defines the PADDR address PADDR: EQU H'FFFFD1 ; Defines the PADR address PADR: EQU H'FFFFD3 MOV.B #B'00000011,R0L ; Prepares a setting in R0L MOV.B R0L,@PADR ; Sets the PA1 and PA0 default output values (off) in PADR MOV.B R0L,@PADDR ; Writes "1" in lower bits of PADDR and sets PA1 and PA0 to output pins Write "1" in the lower bits of the PADR and then set the lower pins of port A to output This turns both LED1 and LED2 off by default To turn only LED1 on/off, use the following instructions: BCLR #0,@PADR BSET #0,@PADR BNOT #0,@PADR ; Turns only LED1 on ; Turns only LED1 off ; Inverts the on/off status of LED1 only To control a specific LED only, use the bit handling instruction as shown above To control several LEDs simultaneously, on the other hand, it is better to use the MOV instruction for bulk change than using the bit handling instruction to change the on/off status for each LED This is because the bit handling instruction changes the statuses one by one, taking a long time to change all the LEDs MOV.B MOV.B MOV.B MOV.B http://resource.renesas.com #B'00000000,R0L R0L,@PADR #B'00000011,R0L R0L,@PADR ; Sets LED1 and LED2 On data in R0L ; Turns LED1 and LED2 on simultaneously ; Sets LED1 and LED2 Off data in R0L ; Turns LED1 and LED2 off simultaneously Page 107 MOV.B XOR.B MOV.B @PADR,R0L ; Loads the current output value (On data) to R0L #B'00000011,R0L ;Sets LED1 and LED2 On/Off inversion data in R0L ; Inverts LED1 and LED2 on/off simultaneously R0L,@PADR Precautions on initializing I/O ports When initializing I/O ports to output or input (described in the next section), be sure to use the MOV instruction to write data in the DDR Unlike the DR, the bit handling instruction is not available because the BSET or BCLR instruction is executed in three operations of read, modify and write As a result, executing the following instruction for the PADDR to set only PA0 to output also sets the PA7 to PA1 I/O pins to output BSET #0,@PADDR ; Sets only the PA0 pin to output ; Wrong The PA7 to PA1 pins are also set to output After the BSET instruction is executed, the PADDR value is read in 8bit units Since the PADDR is a write-only register, bits are all read to be "1" at this time no matter whether "0" or "1" is actually set After this, bit specified by the instruction is changed to "1" (although it is "1" in the first place) and written in bit units As a results, all pins are set to output BSET #0,@PADDR ; (1) Read: Reads B'11111111 from PADDR ; (2) Modify: Changes bit of the read value to "1" ; (3) Write: Writes B'11111111 to PADDR ; As a result, all pins are set to output The DDR is a write-only register and incapable of reading If any bit handling instruction to cause reading is used for it, a bit not targeted for handling may be set to an unexpected value Remember that the bit handling instruction must not be used for the I/O port DDR C Language Sample PADDR: EQU H'FFFFD1 ; Defines the PADDR address PADR: EQU H'FFFFD3 ; Defines the PADR address MOV.B #B'00000011,R0L ; Prepares a setting in R0L MOV.B R0L,@PADR ; Sets the PA1 and PA0 default output values (off) in PADR MOV.B R0L,@PADDR ; Writes "1" in lower bits of PADDR and sets PA1 and PA0 to output pins #define PADDR (*(volatile unsigned char *)0xffffd1) #define PADR (*(volatile unsigned char *)0xffffd3) PADR = 0x03 ; PADDR = 0x03 ; http://resource.renesas.com Page 108 Write "1" in the lower bits of the PADR and then set the lower pins of port A to output This turns both LED1 and LED2 off by default To turn only LED1 on/off, use the following instructions: BCLR #0,@PADR ; Turns only LED1 on PADR &= 0xfe ; BSET #0,@PADR ; Turns only LED1 off PADR |= 0x01 ; BNOT #0,@PADR ; Inverts the on/off status of LED1 only PADR ^= 0x01 ; 8.3.2 Sample Port Input Figure 8.5 shows an example for setting port B to input to judge the switch on/off status Figure 8.5: Judgement of Switch On/Off Status As for the pins set to input by the DDR and port 7, the statuses can be read by reading the DR To read the status of the switch connected to port B as shown in Figure 8.5, write "0" in the corresponding bit of the PBDDR and set the corresponding pin of port B to input to read the PBDR At this time, "0" is read from the PBDR if the switch is turned on, or "1" if turned off If nothing is done after resetting, the DDR is set to "0", or input, by default The switch status can be checked only by reading the DR Port B for judging the switch on/off status using this circuit is initialized as follows: In the following example, unused pins and all pins of port B are set to input PBDDR: EQU PBDR: EQU MOV.B MOV.B ; Defines the PBDDR address H'FFFFD4 ; Defines the PBDR address H'FFFFD6 #B'00000000,R0L ; Prepares a setting in R0L R0L,@PBDDR ;Handles PBDDR to set PB3 and PB2 to input pins ;The above instructions are not required after resetting http://resource.renesas.com Page 109 To check the SW1 status after initializing port B and call the INPUT subroutine after it is turned on, use the following instructions (the contents of the INPUT subroutine is not shown below): WAIT1: BTST BNE JSR #2,@PBDR WAIT1 @INPUT ; Judges the SW1 status : Branches to WAIT1 if not on ; Calls INPUT subroutine To check both SW1 and SW2 statuses and call the OUTPUT subroutine after they are turned on, use the following instructions (the contents of the OUTPUT subroutine is not shown below): WAIT12: MOV.B AND.B BNE JSR @PBDR,R0L ; Reads all bits of port B to R0L #B'00001100,R0L ; Judges the SW1 and SW2 statuses only WAIT12 : Branches to WAIT12 unless both are on @OUTPUT ; Calls OUTPUT subroutine As with the sample output for port A, it is recommended that the bit handling instruction be used to judge a single switch status or a combination of MOV and logical instructions to judge several switches simultaneously Which of the following can be achieved using I/O ports? (A) To simultaneously output 8-bit data using one pin (B) To simultaneously input 4-bit data using four pins (C) To generate an interrupt when the "Low"-level voltage is applied Answer: (B) (A) Data of several bits cannot simultaneously be input or output using one signal line (C) This is the function of an interrupt input pin Where is the DR of an I/O port located? (A) In the CPU, with the name of "Pn data register" (PnDR) (B) Located at any address in the memory by a user (C) Located at a specific address in the memory Answer: (C) Since the H8/3048 employs the memory-mapped I/O method, the DR of an I/O port is located at a specific address in the memory How is an I/O port pin set to input when viewed externally? (A) In "High-Z" state http://resource.renesas.com Page 110 (B) Outputs the "High"-level voltage (C) Outputs the "High"- or "Low"-level voltage depending on whether the DR value is "1" or "0" Answer: (A) (B) and (C) are observed when a pin is set to output An input pin is in High-Z state At which address is the P3DR located? Answer: H'FFFFC6 Refer to "Table 8.1: I/O Port Register Map" in 8-2 Although you need not remember the address, remember which table you should refer to At which address is the PADDR located? Answer: H'FFFFD1 Refer to "Table 8.1: I/O Port Register Map" in 8-2 Although you need not remember the address, remember which table you should refer to To use an I/O port pin as output, what you with the corresponding bit of its DDR? Answer: Write "1" Write I/O in the DDR bit to set the corresponding port pin to output/input Write a program to use parallel data input/output as you have learned in Chapter and run it on the training board Work out through the following steps: • Complete the exercise source program by filling out its blanks • Make sure that the program runs successfully on the training board • If the program will not run as specified in the exercise, consult the sample answer and make necessary changes to it before rerunning it Take a close look at the circuit of SW12 in the training board block diagram To determine whether SW12 has turned on or off, output a low-level voltage from PA6 and leave PA3, PA4, and PA5 in the input state By so doing, you can determine the correspondence between the value read from P70 and the resulting on/off status of SW12, as follows: SW12 on SW12 off http://resource.renesas.com Page 111 Eight LEDs are connected by way of the 74LV574 placed at address H'FFFF12 The following correspondence exists between the value written to each bit of address H'FFFF12 and the resulting on/off status of the LED: LED on LED off All eight LEDs come initially off Each time you press SW12, a software timer causes the eight LEDs to increment as an eight-digit binary incremental counter at regular intervals of time Once all the eight have lit up, they go out to continue incrementing further again • • • • Because processing does not advance further until you press SW12 once, allow the program to continue looping as long as SW12 is tested off, and let it exit the loop when SW12 is tested on Program the software timer as a subroutine to gain time Write a program that loads a general-purpose register with a given value at the start of the subroutine and then loops to decrement that value by one until the result of decrementing equals 0, when the program should exit the loop and leave the subroutine The loop count determines how much time the subroutine gains Too short time gained would make changes in the display status of the LEDs look faster beyond visual recognition As the main routine loops, the value at the COUNT address in internal RAM is incremented by one after each interval of time allowed by the software timer Allowing for the correspondence between the value of or written to address H'FFFF12 and the resulting on/off status of the LED, it is necessary to create the one's complement of the value that is incremented by one and write it to address H'FFFF12 http://resource.renesas.com Page 112 http://resource.renesas.com Page 113 ... H8/3048 has ports to B as I/O ports available for parallel data input/output Port is for input only These ports have data direction registers (DDRs) and data registers (DRs) as shown in Table 8.1 The... employs the memory-mapped I/O method for data input/output This method has no dedicated data input/output instructions such as "data input instructions" or "data output instructions" and instructions... only Output data once written is kept (output) until the next data is written During data input, on the contrary, the voltage signal being input to a pin is read as it is, not the data written