Design recipes for FPGAs using verilog and VHDL

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Design Recipes for FPGAs Using Verilog and VHDL Design Recipes for FPGAs Using Verilog and VHDL Peter Wilson AMSTERDAM • BOSTON • HEIDELBERG • LONDON NEW YORK • OXFORD • PARIS • SAN DIEGO SAN FRANCISCO • SINGAPORE • SYDNEY • TOKYO Newnes is an imprint of Elsevier Newnes is an imprint of Elsevier 32 Jamestown Road, London NW1 7BY, UK 525 B Street, Suite 1800, San Diego, CA 92101-4495, USA 225 Wyman Street, Waltham, MA 02451, USA The Boulevard, Langford Lane, Kidlington, Oxford OX5 1GB, UK First edition 2007 Second edition 2016 © 2016 Elsevier Ltd All rights reserved Previous edition: Copyright © 2007 Peter R Wilson All rights reserved No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher Details on how to seek permission, further information about the Publisher’s permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website: www.elsevier.com/permissions This book and the individual contributions contained in it are protected under copyright by the Publisher (other than as may be noted herein) Notices Knowledge and best practice in this field are constantly changing As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein Library of Congress Cataloging-in-Publication Data A catalog record for this book is available from the Library of Congress British Library Cataloguing in Publication Data A catalogue record for this book is available from the British Library For information on all Newnes publications visit our website at http://store.elsevier.com/ Printed and bound in the United Kingdom ISBN: 978-0-08-097129-2 Publisher: Todd Green Acquisitions Editor: Tim Pitts Editorial Project Manager: Charlotte Kent Production Project Manager: Lisa Jones Designer: Mark Rogers Preface to the Second Edition The original idea behind the first edition of this book was to collect some of the useful methods for designing digital systems using FPGAs that I had accumulated over the years and had been passing on to students in our courses at the University of Southampton As a result, the original book was written using VHDL, as this was very often the hardware description language of choice for university students and for many courses (as was the case at Southampton) The intervening time has seen the development of other options, such as System-C or System-Verilog (plus the continuing popularity of Verilog) One of the common questions to me was “Why is there not a Verilog edition of this book?” I have therefore taken the opportunity with the second edition to introduce Verilog, to widen the applicability of the book to as many designers as possible The second edition also offers the chance to correct errors and take on board the numerous reviews over the past seven years since the first edition was published For these comments and suggestions I am most grateful to the readers of the book FPGAs have also moved on in leaps and bounds since the first edition, and this also gives an opportunity to update some of the technological background and correct errors in the first edition Above all else, this book was not and is not intended to be a textbook for digital systems design, but rather a useful handbook for designers to dip in and use wherever it can help I sincerely hope you find this book useful and good luck with your FPGA designs! Peter Wilson University of Bath xv Preface to the First Edition This book is designed to be a desktop reference for engineers, students and researchers who use field programmable gate arrays (FPGAs) as their hardware platform of choice This book has been produced in the spirit of the “numerical recipe” series of books for various programming languages – where the intention is not to teach the language per se, but rather the philosophy and techniques required in making your application work The rationale of this book is similar in that the intention is to provide the methods and understanding to enable the reader to develop practical, operational VHDL that will run correctly on FPGAs It is important to stress that this book is not designed as a language reference manual for VHDL There are plenty of those available and I have referenced them throughout the text This book is intended as a reference for design with VHDL and can be seen as complementary to a conventional VHDL textbook xvii Acknowledgments The first acknowledgement I must make is to the colleagues and students who have inspired, supported, and tolerated my teaching over the past 15 years at the Universities of Southampton and Bath In no particular order, some of the key people in that process have been Professor Andrew Brown, Dr Reuben Wilcock, Dr Neil Ross, Professor Alan Mantooth, and Professor Mark Zwolinski I am truly grateful I must also note the kind and tolerant Elsevier staff who have cajoled me into this second edition, including Tim Pitts, Charlotte Kent, and Lisa Jones, plus all the reviewers who provided helpful comments during this process—thanks Finally, a big “thank you” goes to my wife Caroline and daughter Heather Without their support and love, none of this would be possible Peter Wilson University of Bath xix PA R T Overview The first part of the book provides a starting point for engineers who may have some digital experience but not necessarily with FPGAs in particular, or with either of the languages featured in this book (VHDL and Verilog) While the book is not intended to teach either language, “primers” are given in both as aides de memoire to get started An overview of the main design approaches and tool flows is also provided as a starting point CHAPTER Introduction 1.1 Overview The book is divided into five main parts In the introductory part of the book, primers are given on FPGAs (field-programmable gate arrays), Verilog and the standard design flow In the second part of the book, a series of complex applications that encompass many of the key design problems facing designers today are worked through from start to finish in a practical way This will show how the designer can interpret a specification, develop a top-down design methodology and eventually build in detailed design blocks perhaps developed previously or by a third party In the third part of the book, important techniques are discussed, worked through and explained from an example perspective so you can see exactly how to implement a particular function This part is really a toolbox of advanced specific functions that are commonly required in modern digital design The fourth part on advanced techniques discusses the important aspect of design optimization, that is, how can I make my design faster, or more compact? The fifth part investigates the details of fundamental issues that are implemented in VHDL and Verilog This final part is aimed at designers with a limited VHDL or Verilog coding background, perhaps those looking for simpler examples to get started, or to solve a particular detailed issue 1.2 Verilog vs VHDL One of the longest standing “arguments” between engineers in digital design has been the issue of which is best—Verilog or VHDL? For many years this was partly a geographical divide, with North America seeming to be mainly using Verilog and Europe going more for VHDL, although this was not universal by any means In many cases, the European academic community was trending toward VHDL with its easy applicability to system level design, and the perception that Verilog was really more a “low level” design language With the advent of SystemVerilog and the proliferation of design tools, these boundaries and arguments have largely subsided, and most engineers realize that they can use IP blocks from either language in most of the design tools Of course, individuals will always have their own preferences; however it is true to say that now it is genuinely possible to be language agnostic and use whichever language and tools the user prefers More often than not, the choice will depend on Design Recipes for FPGAs http://dx.doi.org/10.1016/B978-0-08-097129-2.00001-5 Copyright © 2016 Elsevier Ltd All rights reserved Chapter three main factors: (a) the experience of the user (for example, they may have a background in a particular language); (b) the tools available (for example, some tool flows may simply work better with a particular language—SystemVerilog for instance may not be supported by the tools available); and (c) corporate decisions (where the company or institution has a preference for a specific language, and in turn this may mean that libraries must be in a specific format and language) For researchers, there is a plethora of information on all design languages available, with many example designs published on the web, making it relatively simple to use one or another of the main languages, and sometimes even a mixture of languages (using precompiled libraries, for example) Of course, this is also available to employees of companies and free material is now widely available from sources such as Open Cores (http://www.opencores.org), the Free Model Foundry (http://www.freemodelfoundry com/) and the Open Hardware Repository at CERN (http://www.ohwr.org/) 1.3 Why FPGAs? There are numerous options for designers in selecting a hardware platform for custom electronics designs, ranging from embedded processors, application specific integrated circuits (ASICs), programmable microprocessors (PICs), FPGAs to programmable logic devices (PLDs) The decision to choose a specific technology such as an FPGA should depend primarily on the design requirements rather than a personal preference for one technique over another For example, if the design requires a programmable device with many design changes, and algorithms using complex operations such as multiplications and looping, then it may make more sense to use a dedicated signal processor device such as a DSP that can be programmed and reprogrammed easily using C or some other high level language If the speed requirements are not particularly stringent and a compact cheap platform is required, then a general purpose microprocessor such as a PIC, AVR, or MBED would be an ideal choice Finally, if the hardware requirements require a higher level of performance, say up to several hundred megahertz operation, then an FPGA offers a suitable level of performance, while still retaining the flexibility and reusability of programmable logic Other issues to consider are the level of optimization in the hardware design required For example, a simple software program can be written in C and then a microprocessor programmed, but the performance may be limited by the inability of the processor to offer parallel operation of key functions This can be implemented much more directly in an FPGA using parallelism and pipelining to achieve much greater throughput than would be possible using a microprocessor A general rule of thumb when choosing a hardware platform is to identify both the design requirements and the possible hardware options and then select a suitable platform based on those considerations For example, if the design requires a basic clock speed of up to GHz then an FPGA would be a suitable platform If the clock speed could be 3-4 MHz, then the FPGA may be an expensive (overkill) option If the design Introduction requires a flexible processor option, although the FPGAs available today support embedded processors, it probably makes sense to use a DSP or microprocessor If the design requires dedicated hardware functionality, then an FPGA is the route to take If the design requires specific hardware functions such as multiplication and addition, then a DSP may well be the best route, but if custom hardware design is required, then an FPGA would be the appropriate choice If the design requires small simple hardware blocks, then a PLD or CPLD may be the best option (compact, simple programmable logic); however, if the design has multiple functions, or a combination of complex controller and specific hardware functions, then the FPGA is the route to take Examples of this kind of decision can be dependent on the complexity of the hardware involved For example, a high performance signal processor with multiple parallel tasks will probably require an FPGA rather than a PLD device, simply due to the complexity of the hardware involved Another related issue is that of flexibility and programmability If an FPGA is used, and the resources are not used up on a specific device (say up to 60% for example), if a communications protocol changes, or is updated, then the device may well have enough headroom to support additional features, or updates, in the future Finally, the cost of manufacture will be important for products in the field, as well as where the device is deployed (in terms of the overall weight, power requirements, footprint, and volume) Also, the need for upgrading firmware may mandate an FPGA to allow this to be done easily The use of an FPGA also allows much higher performance, particularly on high speed links or memory, enabling the design to be somewhat tolerant of future changes 1.4 Summary Using the simple guidelines and with the aid of some of the examples in this book, an engineer can hopefully make an intelligent choice about the best platform to choose, and also which hardware device to select based on these assumptions A nice aspect of most FPGA design software packages is that multiple design platforms can be evaluated for performance and utilization prior to making a final decision on the hardware of choice This book will show how both VHDL and Verilog can be used to solve typical design problems, and hopefully will help designers get their own designs completed faster and more efficiently Multiplication 353 26.7 Summary This chapter has introduced some techniques for implementing multiplication in VHDL and Verilog for FPGAs and has highlighted the clear difference between using a “first principles” approach as opposed to utilizing the available resources on the FPGA, both in terms of area usage and also in terms of model complexity There are, of course, other topologies of multiplier, including the Booth multiplier to name but one, and these are commonly used in hardware The reader is encouraged to investigate different options for implementing hardware such as multipliers and how best to implement the function for their own application CHAPTER 27 Simple 7-Segment (LCD) Displays 27.1 Introduction Simple 7-segment (LCD) displays are in many respects a simple form of decoder, where an input code of bits is used to specify one of 16 different hexadecimal outputs to be displayed on an LCD module The LCD module itself usually consists of individual LEDs or lights (hence the alternative name “7-segment display”), which are driven to deliver a particular character as shown in Figure 27.1 Obviously the display can show any combination of the individual bits, with 27 combinations; however, in practice they are mostly used to display alphanumeric characters 0-9 and A-F In addition to the basic character display, there is also usually a decimal point light, and this has its own control Therefore, the LCD can be controlled using individual bits; however, to make the designer’s job easier, a decoder which uses the correct hexadecimal character as the input (e.g., 0000 for the character 0) is implemented This also has the benefit that, for counters, the input character can be determined using arithmetic and then the decoder will handle the translation to the individual segments to be shown This is a typical design reuse task, where once this has been done once, then the designer can reuse the code on any application that uses this type of display Finally, depending on the type of module or drive circuit, the logic for the LCD segment being on may be high or low This will vary from device to device, and in the case of this chapter, the particular development kit being used defined the logic levels as being Low for ON and High for OFF A typical LCD display has anode and cathode connections to each light emitting diode (LED) in the display and depending on the type of device will have either common cathodes or anodes This information will be found on the device or development kit data sheet Using this approach, the coding for a hexadecimal character input to the LCD output is defined in the following table: 27.2 VHDL LCD Module Decoder The VHDL for a simple LCD decoder uses a simple VHDL construct setting the output depending on a specific condition If a signal is assigned a value when a condition is satisfied, then a single assignment can be made using the following basic pseudocode: Design Recipes for FPGAs http://dx.doi.org/10.1016/B978-0-08-097129-2.00027-1 Copyright © 2016 Elsevier Ltd All rights reserved 355 356 Chapter 27 Figure 27.1 segment LCD display H3 0 0 0 0 1 1 1 1 H2 0 0 1 1 0 0 1 1 H1 0 1 0 1 0 1 0 1 H0 1 1 1 1 LCD6 1 0 0 1 0 0 0 LCD5 1 0 0 0 0 LCD4 1 1 1 0 0 0 LCD3 0 0 1 0 0 LCD2 0 0 0 0 0 1 LCD1 0 0 1 0 0 1 1 LCD0 0 0 0 0 1 0 output ’0’); elsif rising_edge(clk) then if count = 50000000 then count := (others => ’0’); charcount := charcount + 1; else count := count + 1; end if; end if; charin
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