In-situ Measurement and Control of Photoresist Processing in Lithography HU NI (B.Eng.,HUST) A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2007 Acknowledgments I would like to express my sincere appreciation to my supervisors, Professor Arthur Tay and Professor Ho Weng Khuen, for their excellent guidance and gracious encouragement through my graduate research. I have benefited tremendously from the many discussions I had with them, without whose help this thesis would have been impossible. I am also indebted to them for their care and advice not only in my academic research but also in my daily life. It is also my great pleasure to thank Dr Chen Xiaoqi and Ms Zhou Ying who have in one way or another given me their kind help. I am also extremely thankful to my friends and colleagues: Dr Fu Jun, Wu Xiaodong, Kiew Choon Meng, Wang Yuheng, Chen Ming, Lim Li Hong, Liu Min, Ye Zhen, Lai Junwei, Yan Han, Feng Yong, and many others working in the Advanced Control Technology Lab. I enjoyed very much the time spent with them. I also would like to thank the National University of Singapore for the research facilities and scholarship. I express my gratitude to my parents and brother for their love and support. I i would have never reached so far in life without their constant encouragement and support. Last but not the least, I wish to express my deepest gratitude and love to my husband, Mr. Cao Xiao, for being so understanding and supportive throughout. ii Contents Acknowledgements i Summary vii List of Tables ix List of Figures xiii Introduction 1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Detection of Wafer Warpage using a Single-zone Bakeplate 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii 12 13 13 2.2 Thermal Processing in Lithography . . . . . . . . . . . . . . . . . . 16 2.3 Thermal Modeling of a Single-zone System . . . . . . . . . . . . . . 19 2.4 Experimental Demonstration . . . . . . . . . . . . . . . . . . . . . . 24 2.4.1 Determination of Bakeplate Parameters . . . . . . . . . . . . 26 2.4.2 Warpage Fault Detection . . . . . . . . . . . . . . . . . . . . 28 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2.5 Estimation of Wafer Warpage Profile using a Multi-zone Bakeplate 32 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3.2 Thermal Modelling of a Multi-zone System . . . . . . . . . . . . . . 35 3.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 40 3.3.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . 41 3.3.2 Initialization Phase . . . . . . . . . . . . . . . . . . . . . . . 43 3.3.3 Warpage Profile Estimation . . . . . . . . . . . . . . . . . . 47 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 3.4 An In-situ Approach to Real-time Spatial Control of Steady-state Wafer Temperature 52 iv 4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 4.2 Modelling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 4.3 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 59 4.3.1 Initialization Phase . . . . . . . . . . . . . . . . . . . . . . . 60 4.3.2 Steady-state Wafer Temperature Uniformity Control . . . . 62 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 4.4 Real-time Spatial Control of Photoresist Development Process 68 5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68 5.2 Proposed Approach . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 5.2.1 Experimental Setup . . . . . . . . . . . . . . . . . . . . . . . 71 5.2.2 Photoresist Thickness Estimation . . . . . . . . . . . . . . . 74 Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . 77 5.3.1 Experimental Conditions . . . . . . . . . . . . . . . . . . . . 78 5.3.2 Control of Photoresist Development . . . . . . . . . . . . . . 80 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83 5.3 5.4 Conclusions 85 v 6.1 Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85 6.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 References 90 Appendix 98 A Detailed Derivation of the Plate Temperatures 98 Author’s Publications 101 vi Summary Lithography is the key enabling technology in semiconductor manufacturing. The economic feasibility of all future lithography techniques will depend on the satisfaction of increasingly stringent error tolerances in Critical Dimension (CD) uniformity across the wafer. In this thesis, in-situ measurement and real-time control techniques are used in lithography to detect wafer warpage, control wafer temperature uniformity and photoresist development uniformity. These are important factors that can affect the final CD. Warpage can affect device performance, reliability and CD control in various microelectronic manufacturing processes. Based on first principle thermal modelling and system identification techniques, an in-situ approach is developed for detecting wafer warpage and estimating warpage profile from available temperature measurements of bakeplate. The proposed approach does not require extra processing steps, as compared to conventional off-line methods. A programmable multi-zone thermal processing system is used for real-time steady-state wafer temperature control. By estimating the average air-gap be- vii tween wafer and bakeplate in each zone, the wafer temperature can be estimated. Spatial wafer temperature uniformity at steady-state is achieved through real-time correction of the bake-plate temperatures. Temperature across the wafer is spatially controlled to its desired value. On average, wafer temperature non-uniformity of less than 0.10 C is obtained at steady-state. A real-time control strategy is implemented for a deep ultra-violet (DUV) photoresist development process to achieve development end-time uniformity. Using in-situ resist thickness estimation and Proportional-Integral (PI) control, the resist thickness non-uniformity and development end-time non-uniformity is reduced by manipulating the development temperature distribution in real-time through an integrated bake/chill system. A × improvement in the end-time uniformity across wafer has been achieved. viii List of Tables 1.1 Lithography technology requirements . . . . . . . . . . . . . . . . . 1.2 Temperature control requirement for thermal processing steps. . . . 1.3 PEB resist sensitivity to temperature for each lithography generation. 2.1 Warpage fault detection. . . . . . . . . . . . . . . . . . . . . . . . . 29 3.1 Thermophysical properties of the thermal processing system. . . . . 42 3.2 Thermal capacitances and resistances of the baking system. . . . . . 45 3.3 Estimation of air-gaps. . . . . . . . . . . . . . . . . . . . . . . . . . 48 4.1 Estimation of air-gaps . . . . . . . . . . . . . . . . . . . . . . . . . 65 4.2 Performance comparison of proposed steady-state wafer temperature control and conventional method. Experimental runs (i)(iii) correspond to conventional approach. Experimental runs (ii)(iv) correspond to proposed temperature control approach. . . . . . . . ix 65 estimated using the maximum temperature drop of the bakeplate. After estimating the average air-gap, the corresponding bakeplate temperature is computed and controlled to achieve the desired steady-state wafer temperature. Temperature across the wafer has been spatially controlled to reach its desired value of 90◦ C. On average, wafer temperature non-uniformity of less than 0.1◦ C was obtained at steady-state. With the proposed approach, the mean square error of the steadystate wafer temperature across the wafer was reduced to less than 0.1. The ability to control temperature spatially in this work is due to the fact that our bakeplate is a multi-zone one and the heater power distribution in each zone can be controlled independently by using temperature feedback and PI control algorithm. This is one advantage over conventional baking system where only single-zone bakeplate is used. Compared to conventional approach in which any correction for wafer temperature is based on run-to-run techniques, the proposed approach is real-time and can correct for any variations in the desired steady-state wafer temperature. In Chapter 5, a real-time control strategy is implemented for a DUV photoresist development process to achieve good resist thickness uniformity and development end-time uniformity. An array of optical probes in a spectrometry system is used to obtain the reflected light intensity profiles from resist film during the development process. DUV photoresist film thickness at different sites across the wafer are then estimated in real-time by analyzing reflected light signals using Least Square Estimation Technique. The ability to estimate the resist thickness in real-time is vital for a controller to work well because resist thickness serves as a feedback path containing the development information on how the process is going on. With 87 feedback of these in-situ resist thickness estimation, the temperature profile of bakeplate is controlled in real-time by manipulating the heater power injected into the integrated bake/chill system using PI control algorithm. Development is a chemical process, which is sensitive to temperature. The feasibility of controlling the development process is due to the fact that temperature can affect photoresist development rate. The ability to control development temperature spatially gives a uniform resist thickness distribution across the wafer during the development process. A × improvement in the end-time uniformity across wafer has been achieved. The proposed approach addresses a challenging problem by controlling the development process of a DUV photoresist which will be a necessity for the DUV photolithography processes in 0.25-µm or smaller feature patterning applications. 6.2 Future Work The focus of this thesis is on the baking and development processes in lithography. The lithography sequence in Figure 1.1 is also used in mask making by transferring the image of the IC layout to the chromium on the quartz glass. Hence, temperature uniformity control and development process control for wafer processing discussed in this thesis can also be extended to photomask processing. It is known that wafer warpage can cause non-uniform temperature distribution across the wafer affecting CD control. It has been demonstrated in Chapter that 88 wafer temperature can be estimated and controlled in real-time by manipulating the bake-plate temperature. A possible future work is to apply the wafer temperature control technique introduced in Chapter to compensate CD variation caused by wafer warpages. Development rate is a function of both temperature and pH value of the developer solution. In Chapter 5, it has been demonstrated that the development process uniformity can be controlled by manipulating the temperature distribution. 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[58] Lin B.J., “A Double-exposure Technique to Macroscopically Control Submicrometer Linewidths in Positive Resist Images”, IEEE Transactions on Electron Devices, Vol. 25, no. 4, pp. 419 - 424, 1978. 97 Appendix A Detailed Derivation of the Plate Temperatures The appendix shows the derivations of Equations (4.11) and (4.12) from Equations (4.7) to (4.10). First, Θw1 (s) and Θw2 (s) in Equations (4.9) and (4.10) can be expressed as Cw2 rw12 Cw1 W2 (s) Θw1 (s) = θw1 (0) + θw2 (0) W (s) W (s) 1 W2 (s) ra1 rw12 ra2 + Θp1 (s) + Θp2 (s) W (s) W (s) Cw1 rw12 Cw2 W1 (s) Θw2 (s) = θw1 (0) + θw2 (0) W (s) W (s) 1 W1 (s) ra2 rw12 ra1 + Θp1 (s) + Θp2 (s) W (s) W (s) 98 (A.1) (A.2) where Rw1 W2 (s) = sCw2 + Rw2 W1 (s) = sCw1 + W (s) = W1 (s)W2 (s) − rw12 = Cw1 Cw2 s2 + (Cw1 1 1 + Cw2 )s + − Rw2 Rw1 Rw1 Rw2 rw12 The Laplace Transform of the two Proportional-Integral (PI) controllers are given as + 1)(0 − Θp1 (s)) sTI1 + 1)(0 − Θp2 (s)) q2 (s) = Kc2 ( sTI2 q1 (s) = Kc1 ( (A.3) (A.4) Substituting Equations (A.1), (A.2), (A.3) and (A.4) to Equations (4.7) and (4.8) gives G(s) θw1 (0) + E(s) I(s) Θp2 (s) = θw1 (0) + E(s) Θp1 (s) = H(s) θw2 (0) E(s) J(s) θw2 (0) E(s) where E(s) = C1 (s)C2 (s) − Rpp (s)D1 (s)D2 (s) Cw1 1 + Rpp (s)D2 (s)Cw1 ] ra1 rw12 ra2 1 Cw2 H(s) = sTI1 [C2 (s)Cw2 + Rpp (s)D2 (s)W1 (s) ] rw12 ra1 ra2 1 Cw1 I(s) = sTI2 [C1 (s)Cw1 + Rpp (s)D1 (s)W2 (s) ] rw12 ra2 ra1 Cw2 1 J(s) = sTI2 [C1 (s)W1 (s) + Rpp (s)D1 (s)Cw2 ] ra2 rw12 ra1 G(s) = sTI1 [C2 (s)W2 (s) 99 (A.5) (A.6) D1 (s) = W (s)sTI1 D2 (s) = W (s)sTI2 C1 (s) = B1 (s)sTI1 + W (s)Kc1 (1 + sTI1 ) C2 (s) = B2 (s)sTI2 + W (s)Kc2 (1 + sTI2 ) 1 )W (s) − W2 (s) Rp1 ra1 1 B2 (s) = (sCp2 + )W (s) − W1 (s) Rp2 ra2 1 Rpp (s) = + rp12 rw12 ra1 ra2 W (s) B1 (s) = (sCp1 + Next, we note that E(s) is an eighth-order polynomial of s with the first coefficient 2 E1 = (Cp1 Cp2 Cw1 Cw2 )TI1 TI2 . Finally, taking inverse Laplace Transform of Equations (A.5) and (A.6), θp1 (t) and θp2 (t) can be obtained as shown in Equations (4.11) and (4.12) where Pti(s) = Pt (s) s + (i = 1, 2, · · · , 8) (A.7) and Pt (s) = E(s) = (s + a1 )(s + a2 ) · · · (s + a8 ) E1 (A.8) where a1 , a2 , · · · , a8 are the roots of Pt (s) = 100 (A.9) Author’s Publications Journal Publications [1] Arthur Tay, Weng Khuen Ho, Ni Hu and Xiaoqi Chen, “Estimation of wafer warpage profile during thermal processing in microlithography”, Review of Scientific Instruments, Vol. 76, no. 7, pp. 075111-1-7, 2005. [2] Ni Hu, Arthur Tay and Kuen-Yu Tsai, “A fast in situ approach to estimating wafer warpage profile during thermal processing in microlithography”, Measurement Science and Technology, Vol. 17, no. 8, pp. 2233-2240, 2006. [3] Arthur Tay, Weng Khuen Ho and Ni Hu, “An in situ approach to real-time spatial control of steady-state wafer temperature during thermal processing in microlithography”, IEEE Transactions on Semiconductor Manufacturing, Vol. 20, no. 1, pp. 5-12, 2007. 101 Conference Publications [1] Weng Khuen Ho, Arthur Tay, Ying zhou, Kai Yang and Ni Hu, “Detection of Wafer Warpage during Thermal Processing in Microlithography”, the 8th International Conference on Control, Automation, Robotics and Vision, December 6-9, 2004, Kunming, China. [2] Arthur Tay, Weng Khuen Ho, Ni Hu and Ying Zhou, “Fault detection and estimation of wafer warpage profile during thermal processing in microlithography”, AICHE Annual Meeting (2004), November 7-12, 2004, Texas, Austin, U.S.A. [3] Arthur Tay, Weng Khuen Ho and Ni Hu, “Real-time spatial control of steadystate wafer temperature during thermal processing in microlithography”, Proceedings of SPIE, Vol. 6155, pp. 70-79, 2006. [4] Arthur Tay, Weng Khuen Ho, Ni Hu and Choon Meng Kiew, “Real-time monitoring and control of photoresist development process in microlithography”, AEC/APC Symposium XVIII, September 30-Oct 5, 2006, Westminster, Colorado, U.S.A. [5] Arthur Tay, Weng Khuen Ho, Ni Hu and Choon Meng Kiew, “Real-time spatial control of photoresist development rate”, SPIE (Advanced Lithography), 25 February-2 March 2007, San Jose, California, U.S.A. 102 [...]... a variety of temporal and spatial scales Run-to-run (R2R) control is currently the dominant strategy used in the manufacturing of integrated circuits due to lack of in- situ measurement To achieve demanding CD control tolerances, real-time control has to be employed [6] Realtime process control enables real-time adjustment of process parameters for each wafer during processing based on in- situ sensors... monitoring the conditions of the process chamber and/ or the film properties Real-time process control improves the process capability [10–14] in terms of stability, reliability, etc Real-time control requires in- situ measurement [6, 15] The shift of metrology from off-line towards in- situ sensors, provides in- time data for active process control and the elimination of wafer misprocessing The value of applying... processes typically run in open-loop with very little real-time process control utilizing in situ sensors In this thesis, in- situ measurement and real-time control is applied to some aspects of lithography including wafer warpage detection, temperature control and 4 photoresist development control (A) Wafer Warpage Detection Wafer warpage is common in microelectronics processing Wafer warpage can affect... reliability and linewidth or CD control in various microelectronic manufacturing processes It is one of the root causes leading to process and product failures Wafer warpage can also result in a non-uniform temperature distribution across the wafer in the baking process of lithography The noticeable trends of developing integrated circuits nowadays, in particular decreasing the size of elements and increasing... challenges of some aspects of advanced lithography is investigated In particular, the thesis addresses the following: (A) In- situ Fault Detection and Profile Estimation of Wafer Warpage A novel in- situ approach for fault detection and estimation of wafer warpage profile during the thermal processing steps in lithography is developed By using the knowledge that different air-gap between the wafer and bakeplate... available temperature measurements and a profile is obtained by joining these points The proposed approach also requires no extra processing steps and time, as compared to conventional off-line methods in which the wafer has to be removed from the processing equipment and placed in the metrology tool 9 (B) Real-time Spatial Control of Steady-state Wafer Temperature An in- situ method to control the steady-state... given in ITRS 2006 [8] that process control for CD uniformity represents a major challenge for lithography The International Panel on Future Directions in Control, Dynamics and Systems [9], has also identified that the use of control 3 is critical to future progress in semiconductor manufacturing Modelling plays a crucial role and control techniques must make use of more in- situ measurements to control. .. PAC and development rate, etc Temperature can be used to control those parameters Photoresist thickness uniformity control [22, 23] and PAC uniformity control [24] have been realized by manipulating the soft-bake temperature in real-time Real-time control for photoresist development is discussed in this thesis 8 1.2 Contributions In this thesis, the application of in- situ measurement and real-time control. .. development process by controlling the development temperature Conclusions and future work are given in Chapter 6 12 Chapter 2 Detection of Wafer Warpage using a Single-zone Bakeplate 2.1 Introduction Warped wafers are commonly found in microelectronics processing Wafer warpages of up to 260 µm are observed [28] in silicon thinning and stress relief Gettering and dislocation density in silicon wafers also... reducing the vibration and enhancing the fidelity of measurement An extended Range and Ultra-precision Non-contact Dimensional gauge was used for wafer contour measurement in [36] The dimension of the wafer is determined by combining the linear displacement gauge reading with an estimate of the air gap derived from a reading of the air nozzle backpressure This approach has the advantage of high measurement . con- trol and the elimination of wafer misprocessing. The value of applying Advanced Process Control (APC) for both wafer-to-wafer and within wafer control using in- tegrated metrology and in- situ. In- situ Measurement and Control of Photoresist Processing in Lithography HU NI (B.Eng.,HUST) A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER. make use of more in- situ measurements to control at a variety of temporal and spatial scales. Run-to-run (R2R) control is currently the dominant strategy used in the man- ufacturing of integrated