3 High-Temperature Superconducting Multilayer Ramp-Edge Junctions Q. X. Jia Los Alamos National Laboratory, Los Alamos, New Mexico, U.S.A. 3.1 INTRODUCTION There has recently been tremendous progress in the development of high-temper- ature superconducting Josephson junctions and superconducting quantum inter- ference devices (SQUIDs) fabricated from YBa 2 Cu 3 O 7 (YBCO) thin films. Josephson junctions have potential applications to high-speed low-power digital logic, whereas SQUIDs are the most sensitive sensors to the magnetic field. A Josephson junction is composed of two superconductors separated by a barrier. Cooper pairs can tunnel or diffuse through the barrier and current flows through it with no voltage appearing across the junction (1,2). Josephson junctions and their related devices have been fabricated using conventional low-temperature superconductors where the main building block of the device is based on a configuration of superconductor/insulator/superconduc- tor (SIS). In contrast to low-temperature superconducting junctions, many junc- tion structures have been investigated for high-temperature superconductors in or- der to fabricate reproducible and controllable junctions. Since the first report on the fabrication of a natural grain-boundary Josephson junction using YBCO (3), there have been many efforts in the fabrication of Josephson junctions and Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. SQUIDs based on different device constructions. Bicrystal grain boundary (4), biepitaxial grain boundary (5), step-edge grain boundary (6), step-edge supercon- ductor/normal-metal/superconductor (SNS) (7), ramp-edge SNS (8), locally dam- aged superconducting line by ion beams (9), and interface-engineered junctions (10) are the most commonly investigated configurations. The ramp-edge SNS is one of the very attractive device structures used to fabricate high-temperature superconducting junctions because it provides many advantages. Shown in Figure 3.1 is a generic structure of a ramp-edge SNS junc- tion. The device is composed of top and bottom superconductor electrodes iso- lated in the overlapping region by an insulating layer. The active area of the de- vice is located on the ramp, where the N-layer is sandwiched between the top and bottom superconductor electrodes. This ramp-edge SNS structure uses c- axis-oriented superconducting films, where the Josephson current flows along the a-b planes of the electrodes. The most important feature of this SNS scheme compared to that of the grain boundary is that the device can be put anywhere on a chip without affecting other devices. This feature allows flexibility in de- vice design and substrate choice, which makes it possible to fabricate more com- plicated circuitry. Because the junction performance depends on the N-layer thickness and resistivity in the ideal case, one can control the physical proper- ties of the N-layer to fabricate Josephson junctions for specific applications. This chapter describes the processes and materials issues to fabricate ramp-edge SNS junctions and SQUIDs. It also discusses the recent progress in the fabrica- tion of high-temperature superconducting ramp-edge SNS junctions and SQUIDs. 86 Jia F IGURE 3.1 Cross-sectional diagram of a ramp-edge superconductor/normal- metal/superconductor (SNS) junction. The active area of the device is located on the ramp, where the normal metal is sandwiched between the top and bot- tom superconductor electrodes. Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. 3.2 PROCESS AND FABRICATION OF MULTILAYER RAMP-EDGE SNS JUNCTIONS To fabricate the multilayer ramp-edge SNS junction shown in Figure 3.1, one has to go through several processing steps, such as multilayer thin-film deposition, patterning, metallization, packaging, and so on. The most commonly used tech- nique to deposit high-temperature superconducting electrodes and the normal- metal layer is pulsed-laser deposition (PLD), although high-temperature super- conducting thin films have been deposited by other techniques. The substrates commonly used are highly polished single-crystal LaAlO 3 , MgO, NdGaO 3 , Sr- TiO 3 , (LaAlO 3 ) 0.3 –(Sr 2 AlTaO 6 ) 0.7 , and yttria-stabilized zirconia (YSZ). The most commonly used insulating materials to isolate the superconducting electrodes are PrBa 2 Cu 3 O 7 (PBCO), LaAlO 3 , NdGaO 3 , SrTiO 3 , MgO, and CeO 2 . The insulating layer should be highly resistive at operating temperatures. It should also be ther- mally stable at a deposition temperature as high as 800°C and not be poisonous to superconductors or N-layer materials. The following presents an example of processing steps in the fabrication of a multilayer ramp-edge SNS junction by using YBCO as electrodes and PBCO as the N layer. The bottom YBCO (250 Ϯ 20 nm) electrode and the insulating CeO 2 layer (300 Ϯ 20 nm) are deposited first on the LaAlO 3 substrate. The first pho- tolithographic mask is used to define the location and geometry of the bottom YBCO electrode. Ion milling with 200–250-eV Ar ions is used to etch the CeO 2 /YBCO and to form the active ramp edge of the device. The angle between the edge and the substrate surface is controlled in the range of 15° Ϯ 3° (11). The N-layer PBCO and the top YBCO electrode are deposited after strip- ping off the photoresist (PR) and cleaning the edge surface. The second mask is used to define the geometry of the active area of the device. Ion milling is used again to remove unnecessary material and to expose the bottom YBCO for elec- tric contact. The third mask is a lift-off mask that is used to define the location and ge- ometry of contact pads. The contact electrodes can be either Ag or Au. The fin- ished chip is annealed at 400–500°C in oxygen for a desired period of time before packaging for electrical measurements. In total, three masks and two ion-milling steps are used to finish the device fabrication. Figure 3.2 shows the processing se- quence to fabricate ramp-edge SNS junctions. Figure 3.3 shows a top view of a finished SNS junction near the active area of the device. Top and bottom YBCO electrodes could be clearly distinguished from this photograph. The contrast of the electrodes shown in Figure 3.3 is due to different surface finishes. It is very important to have a shallow angle (Ͻ 30°) between the plane of the exposed ramp edge and the substrate plane. This is essential because a high-qual- ity epitaxial c-axis-oriented N layer cannot be grown on a steep edge. A shallow High-Temperature Superconducting Ramp-Edge Junctions 87 Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. angle also makes it easier for the N layer to cover the ramp region with high uni- formity and homogeneity. The degree of the angle can be controlled by baking the PR before the first ion milling. For example, the angle between the substrate sur- face and the edge is above 70° with no bake of PR before ion-milling, but around 15° with a bake of PR at 170°C for 1 min (11). As an alternative to ion milling for the formation of the ramp edge, a mi- croshadow mask can be used to form a very shallow angle and damage-free edge. This can be done in a completely in situ process (12,13). The in situ growth and the avoidance of any treatment of the interfaces result in junctions with a high I c R n product and in the possibility of using a rather thick N-layer barrier. The ion-milling energy and the beam orientation have been found to be cru- cial to success in the fabrication of high-performance junctions. A series of sam- ples have been fabricated by varying the ion-milling energy (200, 300, 600, and 88 Jia F IGURE 3.2 Processing sequences in the fabrication of high-temperature su- perconductor multilayer ramp-edge SNS Josephson junctions, where PR rep- resents photoresist. Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. 900 eV) while fixing the orientation of the ion beam at 60° from normal into the edge of the PR. The experimental results have shown that the higher ion beam en- ergies lead to less control of the device performance. The device yields are also lower when using a high ion-milling energy (14). It has been reported that the de- position of PBCO on an ion beam (with energy of 600 eV) etched and annealed YBCO surface produces an additional layer of cubic and cation-disordered YBCO or PBCO in a few nanometers thickness. The annealing treatment of the damaged surface at 800°C in oxygen atmosphere does not restore the perfect lattice struc- ture of the film (15). However, it should be noted that the degree of the damage to the crystal structure and of the suppression of superconducting properties of YBCO due to ion irradiation depends on the energy and fluence of the ions used (16). In general, ion beam energy of around 250 eV or lower should be used in or- der to minimize the surface damage. Substrate cooling during ion milling is also important to preserve electrical properties of superconductor electrodes and the mechanical properties of the PR. Cooling the substrate stage with chilled water should be sufficient. Liquid nitrogen has also been used to cool the substrate stage during ion milling (17). Ion-milling damage to the ramp edge can be partially removed by Br–ethanol etching after the ion-milling process (18). It has shown that the inter- faces produced involving Br–ethanol etching are essentially of the same structural quality as those produced by the microshadow mask technique, which leads to High-Temperature Superconducting Ramp-Edge Junctions 89 F IGURE 3.3 Top view of a finished SNS junction, where the ramp-edge and top/bottom superconductor electrodes are clearly evident. Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. abrupt and coherent interfaces (15). However, it should be noted that the angle of the edge could be significantly increased by increasing the time of the chemical etching or in combination with ion beam etching (19). In addition, for using low ion-milling energy, annealing the sample in oxygen can be also performed prior to the N-layer deposition to reduce the surface damage. 3.3 SUPERCONDUCTING ELECTRODES FOR MULTILAYER RAMP-EDGE SNS JUNCTIONS High-quality epitaxial superconducting electrodes are essential for high-perfor- mance devices because these films show less critical current fluctuation and vor- tex hopping. For ramp-edge SNS junctions, the superconducting electrode needs to be oriented with the c axis normal to the substrate surface. The typical thickness of the superconductor electrode is in the range 200–300 nm. The general require- ments of physical and superconducting properties of the electrodes are as follows: The orientation mosaic from both the out of plane and in plane should be as small as possible; the surface should be as smooth as possible; and the zero-resistance temperature and the critical current density at 77 K should be as high as possible. The bottom superconducting electrode plays an important role in determin- ing the properties of the ramp-edge SNS junctions. Thus far in high-temperature superconductor ramp-edge SNS junction development, YBCO is the most widely investigated electrode material. Recently, DyBa 2 Cu 3 O 7 (20), GdBa 2 Cu 3 O 7 (21), Ag-doped YBCO (22), Y 1Ϫx Ca x Ba 2Ϫy La y Cu 3 O 7 (23), YBa 1.95 La 0.05 Cu 3 O 7 (24), and NdBa 2 Cu 3 O 7 (25) have been investigated as superconductor electrodes. It has been shown that both the base-electrode material and deposition technique can have a strong effect on SNS device resistance (25). The choice of GdBa 2 Cu 3 O 7 instead of YBCO as the superconductor elec- trode is mainly due to the close lattice match (either a and b or c) between GdBa 2 Cu 3 O 7 and Pr-doped YBCO (21). The GdBa 2 Cu 3 O 7 also tends to give a higher zero-resistance temperature than YBCO. Ag-doped YBCO is used as elec- trodes because it provides superior environmental stability compared to pure YBCO (26). Ramp-edge SNS junctions fabricated from Ag-doped YBCO super- conducting electrodes exhibit little sign of degradation in air (27). Importantly, the controllability and reproducibility of the processing is improved substantially when using Ag-doped YBCO for the electrode (28). The high corrosion resistance of Y 1Ϫx Ca x Ba 2Ϫy La y Cu 3 O 7 makes it attrac- tive as an electrode in ramp-edge SNS junctions. It has been found that a cosub- stitution of Ca 2+ for Y 3+ and La 3+ for Ba 2+ in Y 1Ϫx Ca x Ba 2Ϫy La y Cu 3 O 7 can com- pensate the Cu valence and maintain the transition temperature above 80 K. For this system, an orthorhombic to tetragonal transition is found to occur at y ϳ 0.4 (29). Experimental results have shown that Y 0.6 Ca 0.4 Ba 1.6 La 0.4 Cu 3 O 7 possesses high corrosion resistance in water as well as enhanced processability (30). YBa 2Ϫx La x Cu 3 O 7 with x ϭ 0.025–0.05 is chosen as the electrode because a 90 Jia Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. small amount of La doping can help suppress a-axis grain formation (24). The use of NdBa 2 Cu 3 O 7 is probably due to the fact that the newly optimized NdBa 2 Cu 3 O 7 films are superior to YBCO thin films, with respect the transition temperature, crystallinity, surface stability and smoothness, and oxygenation properties (31). 3.4 NORMAL-METAL BARRIERS FOR MULTILAYER RAMP-EDGE SNS JUNCTIONS Many N-layer materials have been investigated to fabricate ramp-edge SNS junc- tions. Conductive oxides and doped YBCO are the main choice for N-layer mate- rials because of their favorable electrical and structural properties. The thickness of the N layer depends on the material used and the requirements of the specific designs. It is necessary to consider the following factors when choosing N-layer material. It should be lattice and thermal expansion matched with the supercon- ductor electrode; there should be negligible chemical reactions with the electrode; the growth conditions should be compatible with the stability of the superconduc- tor electrode; and the thin N layer should be smooth and pinhole free. The electri- cal properties of the N-layer material should also be considered in order to tune the device performance for specific applications. Table 1 outlines the N-layer ma- terials reported in the literature for the fabrication of ramp-edge SNS junctions (32–46). For completeness, Table 3.1 also outlines the superconductor electrodes High-Temperature Superconducting Ramp-Edge Junctions 91 TABLE 3.1 Different N-Layer Materials Used in Edge-Geometry SNS Junctions Electrodes N-Layer barrier material Ref. YBCO PrBa 2 Cu 3 O 7 Ϫ ␦ 8,19,32,33 Ag-doped YBCO 22 YBCO Y 0.3 Pr 0.7 Ba 2 Cu 3 O 7 Ϫ␦ 34 YBCO Y 0.6 Pr 0.4 Ba 2 Cu 3 O 7 Ϫ␦ 35 GdBa 2 Cu 3 O 7 21 YBCO Nb: SrTiO 36 YBCO YBa 2 Cu 3 O x 14,37 YBCO CaRuO 3 , SrRuO 3 38, 39 YBCO Y 0.7 Ca 0.3 Ba 2 Cu 3 O 7 Ϫ␦ 11,40 YBCO YBa 2 Cu 2.79 Co 0.21 O 7 Ϫ␦ 40, 41 YBa 1.95 La 0.05 Cu 3 O 7 24 YBCO La O.5 Sr 0.5 CoO 3 , La 1.4 Sr 0.6 CuO 4 40 YBCO PrBa 2 Cu 3 Ϫ x Ga x O 7 (x ϭ 0.15, 0.3) 42 DyBa 2 Cu 3 O 7 (x ϭ 0.1, 0.4) 20 YBCO Y 1 Ϫ x Pr x Ba 2 Cu 3 O 7 (radient) 43 YBCO NdBa 2 Cu 3 O 7 Ϫ x 44 YBCO Ga-doped YBCO 45 YBCO Indium–tin–oxide 46 Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. used to fabricate these devices. Currently, the most commonly used N-layer ma- terials for ramp-edge SNS junctions are Co-doped YBCO and PBCO. It should be noted that the N layer may not always determine the junction properties in ramp-edge SNS configuration due to the interface and the inhomo- geneity of the N layer. Depending on the N-layer materials and fabrication pro- cesses, the resistance of junctions can be controlled by the interface instead of the N-layer barrier. For example, the majority of the junction resistance comes from the interface between YBCO and the barrier with conductive oxides such as CaRuO 3 and SrRuO 3 as N-layer material. It is speculated that the stress due to the thermal expansion mismatch between YBCO and CaRuO 3 may give rise to oxygen disorder in the vicinity of the interface and thereby increase the in- terface resistance (40). Resistance of junctions can be only determined by the physical properties of the N layer if the interface resistance is negligibly small compared with the N-layer resistance. For example, the use of Co-doped YBCO as a barrier for ramp-edge SNS junctions seems quite promising based on the published results. No significant interface resistance between YBCO and the barrier has been observed (40). In this case, the temperature dependence of the critical current of the junction can be well described by the conventional prox- imity effect (47). It should be noted also that the inhomogeneity of the N layer can lead to pinholes or microshorts in the barrier. The rough ramp-edge mor- phology of YBCO may even induce the nucleation of secondary phases which have completely different electrical characteristics, thus changing the behavior of the junctions (48). In this case, the junction current and resistance may not be controlled by the N-layer thickness. Therefore, it is important to carefully con- trol the morphology of ramp-edge. 3.5 OTHER MULTILAYER RAMP-EDGE JUNCTIONS Recently, interface-engineered ramp-edge Josephson junctions have been fabri- cated by modification of the edge surface prior to counterelectrode deposition. These devices appear to be uniform and reproducible. A detailed description of the processing procedures can be found in Ref. 10. It is well known that the crystal structure and chemical composition strongly influence electrical properties of YBCO materials. The idea in this scheme is to create a few-nanometer-thick sur- face layer of YBCO on the junction edge by altering the structure or chemistry of the existing YBCO to form an effective barrier. It should be noted that the nature of the barrier based on this technique is still unclear. It is speculated that the barrier material created in this way is near some sort of metal–insulator transition. It is also argued that a normal conducting barrier is formed by the depression in the transition temperature of the YBCO due to the induced particle damage from this process (49). 92 Jia Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. 3.6 CHARACTERISTICS OF MULTILAYER RAMP-EDGE SNS JUNCTIONS The current–voltage (I–V ) characteristic of an ideal superconductor/insulator/su- perconductor Josephson junction is described by a resistively and capacitively shunted junction model for which the device shows a hysteretic I–V curve. For the high-temperature superconducting ramp-edge SNS junction, on the other hand, the capacitance of the device is negligibly small. In this case, the I–V characteris- tic can be described by a resistively shunted junction (RSJ) model: V ϭ I c R n ΄΂ ᎏ I I c ᎏ ΃ 2 Ϫ 1 ΅ 1/2 for I Ͼ I c (1) where the device shows a nonhysteretic I–V curve as shown in Figure 3.4. In Eq. (1), the I c is the critical current of the junction and the R n is the junction resistance determined from the slope of the dashed line shown in Figure 3.4. High-Temperature Superconducting Ramp-Edge Junctions 93 F IGURE 3.4 Current versus voltage characteristic of a ramp-edge SNS junc- tion. The current versus voltage characteristic can be described by a RSJ model. The dashed line in the figure is used to determine the junction resis- tance. Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. For an ideal SNS junction, the conventional theory of the proximity effect should apply. The proximity theory predicts that I c ϳ I c0 exp ΂ ᎏ Ϫ ␰ L n n ᎏ ΃ (2) where ␰ n is the coherence length of the normal-metal barrier and L n is the effec- tive barrier thickness (L n ϾϾ␰ n ). I c0 is somewhat temperature and superconduct- ing electrode dependent. The coherence length in the N layer is given by ϭϩ (3) where ␰ nc ϭ h - v F /2␲KT and ␰ nd ϭ (␰ nc l/3) 1/2 are the clean-limit (l ϾϾ␰ n ) and dirt- limit (l ϽϽ␰ n ) coherence lengths in the N layer. Here, h - is h/2␲, v F is the Fermi velocity in the material, and l is the carrier mean free path. An excellent review ar- ticle on the theoretical understanding of SNS junctions is Ref. 50. It should be noted that the effective N-layer thickness L n is proportional to the N-layer thick- ness (t) with the relationship t/sin ␪, where ␪ is the angle between the substrate sur- face and the ramp edge. In a very shallow-angle ramp-edge junction, the L n can be much larger than t. The presence of well-defined Shapiro steps in the I–V curve under mi- crowave irradiation is widely used as a verification of the Josephson effect. The ramp-edge SNS junctions fabricated using variety of N-layer materials and high- temperature superconducting electrodes also show clear Shapiro steps under mi- crowave irradiation with frequencies in the gigahertz range. Figure 3.5 shows a typ- ical I–V curve under microwave irradiation for a ramp-edge SNS junction fabricated using Ag-doped YBCO as the electrode and PBCO as an N-layer bar- rier (51). The measured voltage step height agrees well with the theoretical calcu- lation based on the Josephson relation of V n ϭ nhƒ/2e (n ϭϮ1, Ϯ2, . . .), where ƒ is the frequency of the applied microwaves and the other symbols have their usual meaning. The actual device performance, on the other hand, is affected by many fac- tors. The interface between S/N or N/S has been recognized as the most important controlling factor in determining the performance of SNS junctions (40). The dif- ficulty in controlling the interface comes from several intrinsic and extrinsic sources. The interface between S/N or N/S can be degraded due to the anisotropic nature of high-temperature superconductor materials, mismatch in the lattice and thermal expansion coefficient between the superconductor and N-layer, chemical incompatibility between the superconductor electrode and N-layer, growth of the multilayer thin film on a ramp edge instead of on a flat surface, damage to the su- perconductor bottom electrode from the ion beam used to pattern the film, or the unavoidable grain-boundaries intrinsic to the oxides. 1 ᎏ ␰ 2 nd 1 ᎏ ␰ 2 nc 1 ᎏ ␰ 2 n 94 Jia Copyright © 2003 by Marcel Dekker, Inc. All Rights Reserved. [...]... artificial PrBa2Cu3O7 barriers above 77 K Appl Phys Lett 64: 25 84 2586, 19 94 JB Barner, BD Hunt, MC Foote, WT Pike, RP Vasquez YBa2Cu3O7Ϫ␦-based, edgegeometry SNS Josephson junctions with low resistivity PrBa2Cu3O7Ϫ␦ barriers Physica C 207:381–390, 1993 Copyright © 2003 by Marcel Dekker, Inc All Rights Reserved 100 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 Jia C Stolzel, M Siegel, G Adrian, C... junctions Appl Phys Lett 64: 1292–12 94, 19 94 SS Tinchev, S Alexandrova Comment on: Properties of interface-engineered high Tc Josephson junctions Appl Phys Lett 73:1 745 –1 746 , 1998 KA Delin, AW Kleinsasser Stationary properties of high- critical -temperature proximity effect Josephson junctions Supercond Sci Technol 9:227–269, 1996 QX Jia, Y Fan, C Mombourquette, D Reagor Development of ramp-edge SNS junctions... thermal annealing treatment Physica C 243 :2 94 302, 1995 17 H Schneidewind, F Schmidl, S Linzen, P Seidel The possibilities and limitations of ion-beam etching of YBa2Cu3O7Ϫx thin-films and microbridges Physica C 250:191–201, 1995 Copyright © 2003 by Marcel Dekker, Inc All Rights Reserved High- Temperature Superconducting Ramp-Edge Junctions 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 99 RP Vasquez,.. .High- Temperature Superconducting Ramp-Edge Junctions 95 FIGURE 3.5 Current versus voltage characteristic of a ramp-edge SNS junction under microwave irradiation (From Ref 51.) 3.7 APPLICATIONS OF MULTILAYER RAMP-EDGE SNS JUNCTIONS AND SQUIDS One of the very attractive applications of Josephson junctions is in single-fluxquantum (SFQ) digital circuit which can perform logic operation at extremely high. .. 27:3209–30 14, 1991 7 MS Dilorio, S Yoshizumi, KY Yang, J Yang, M Maung Practical high- Tc Josephson junctions and dc SQUIDs operating above 85 K Appl Phys Lett 58:2552–25 54, 1991 8 J Gao, WAM Aarnink, GJ Gerritsma, H Rogalla Controlled preparation of all highTc SNS-type edge junctions and dc SQUIDs Physica C 171:126–130, 1990 9 MJ Zani, JA Luine, RW Simon, RA Davidheiser Focused ion-beam high- Tc superconductor. .. deposition Appl Phys Lett 58:6 34 636, 1991 13 MD Strikovski, F Kahlmann, J Schubert, W Zander, V Glyantsev, G Ockenfuss, CL Jia Fabrication of YBCO thin-film flux transformers using a novel microshadow mask technique for in situ patterning Appl Phys Lett 66:3521–3523, 1995 14 D Reagor, R Houlton, K Springer, M Hawley, QX Jia, C Mombourquette, F Garzon, XD Wu Development of high temperature superconducting... 59:982–9 84, 1991 K Char, MS Colclough, TH Geballe, KE Myers High Tc superconductor normal superconductor Josephson junctions using CaRuO3 as the metallic barrier Appl Phys Lett 62:196–198, 1993 L Antognazza, K Char, TH Geballe, LLH King, AW Sleight Josephson coupling of YBa2Cu3O7Ϫx through a ferrpmagnetic barrier SrRuO3 Appl Phys Lett 63: 1005–1007, 1993 K Char, L Antognazza, TH Geballe Study of interface... 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YBa 2 Cu 2.79 Co 0.21 O 7 Ϫ␦ 40 , 41 YBa 1.95 La 0.05 Cu 3 O 7 24 YBCO La O.5 Sr 0.5 CoO 3 , La 1 .4 Sr 0.6 CuO 4 40 YBCO PrBa 2 Cu 3 Ϫ x Ga x O 7 (x ϭ 0.15, 0.3) 42 DyBa 2 Cu 3 O 7 (x ϭ 0.1, 0 .4) 20 YBCO Y 1. Lett 63: 242 0– 242 2, 1993. 41 . K Char, L Antognazza, TH Geballe. Properties of YBa 2 Cu 3 O 7Ϫx /YBa 2.79 Co 0.21 Cu 3 O 7Ϫx /YBa 2 Cu 3 O 7Ϫx edge junctions. Appl Phys Lett 65:9 04 906, 19 94. 42 . MI. properties of YBa 2 Cu 3 O 7Ϫx /CaRuO 3 / YBa 2 Cu 3 O 7Ϫ x Josephson edge junctions. Appl Phys Lett 64: 1292–12 94, 19 94. 49 . SS Tinchev, S Alexandrova. Comment on: Properties of interface-engineered high