[...]... watermarking 61 63 66 66 68 73 74 79 List of Figures xi 4.1 A symmetric interactive fingerprinting IP protection technique 84 4.2 Basic template for iterative global optimization 88 4.3 The generic iterative approach for generating fingerprinted solutions 88 4.4 Iterative fingerprinting technique in the system design process 89 4.5 Two-phase fingerprinting technique for IP protection: generating n solutions... the fingerprinting flow on three standard bipartitioning test cases Tests were run using actual cell areas‚ and a partition area balance tolerance of 10% Each trial consists of generating an initial solution‚ then generating a sequence of 20 fingerprinted solutions All results are averages over 20 independent trials xiii 49 55 56 56 58 61 76 77 96 97 xiv INTELLECTUAL PROPERTY PROTECTION IN VLSI DESIGNS. .. again expressed in microns 99 Results for coloring the DIMACS challenge graph with iterative fingerprinting 99 Number of undetermined variables (Var.)‚ average distance from original solution (Distance)‚ and average CPU time (in of a second) for fingerprinting SAT benchmarks 101 Summary of the four fingerprinting techniques Characteristics of benchmark graphs from real life Coloring the fingerprinted... FlashPoint Technology’s Digita operating environment) is built around the core to provide customers the flexibility of integrating with their own IP to ensure different solutions 6 INTELLECTUAL PROPERTY PROTECTION IN VLSI DESIGNS Intellectual property typically refers to products of the human intellect, such as ideas, inventions, expressions, unique names, business methods and formulas, mask works, information,... Accolade Inc in 1992 for the game cartridges 2, Intel Corp v Terabyte Intern Inc in 1993 for Intel trademark infringement 3, Apple Computer Inc v Microsoft Corp in 1994 for the use of Apple’s GUI4, Cadence Inc v Avant! Corp in 1995 for the copy of source code5, Sony Inc v Connectix Corp in 1999 for the copy of Sony’s copyrighted BIOS6, and the lawsuit against Napster, Inc by a number of major recording...x INTELLECTUAL PROPERTY PROTECTION IN VLSI DESIGNS 3.1 3.2 3.3 3.4 3.5 3.6 Watermark embedding and signature verification process in the constraint-based watermarking method illustrated by the graph coloring problem Key concept behind constraint-based watermarking: additional constraints cut the original solution space and uniqueness of the watermarked... to thrive, intellectual property (IP) protection is a unique and one of the most challenging areas awaiting research breakthroughs 1 2 INTELLECTUAL PROPERTY PROTECTION IN VLSI DESIGNS What makes IP protection a unique challenge is the new reuse-based design environment IP reuse forces engineers to cooperate with others and share their data, expertise, and experience Design details (including the RTL... IPs and doing physical chip design can be broken into the following steps: Selecting IP blocks and preparing them for integration Integrating all the IP blocks into the top-level RTL Planning the physical design Synthesis and initial timing analysis Initial physical design and timing analysis, with iteration until timing closure Final physical design, timing verification, and power analysis Physical verification... fingerprinting results for the Test2 instance We report CPU time (mm:ss) needed to generate each solution‚ as well as total wirelength costs normalized to the cost of the initial solution Manhattan distances from are given in microns 98 Summary of results for fingerprinting of all four standardcell placement instances “Original” lines refer to the initial solutions All other lines refer to fingerprinted... crucial importance for a number of dominating business models Maybe even more importantly‚ it is an elegant and challenging scientific and engineering challenge This book provides in detailed treatment of our newly developed constraint-based protection paradigm for the protection of intellectual properties in VLSI CAD The key idea is to superimpose additional constraints that correspond to an encrypted . Fingerprinting Technique General Fingerprinting Assumptions Context for Fingerprinting in IP Protection Fingerprinting Objectives 3 Iterative Fingerprinting. w0 h0" alt="" INTELLECTUAL PROPERTY PROTECTION IN VLSI DESIGNS This page intentionally left blank Intellectual Property Protection in VLSI Designs Theory