[...]... manfred.dietrich@eas.iis.fraunhofer.de M Dietrich and J Haase (eds.), Process Variations and Probabilistic Integrated Circuit Design, DOI 10.1007/978-1-4419-6621-6 1, © Springer Science+Business Media, LLC 2012 1 2 J Haase and M Dietrich 1.1 Development of CMOS Semiconductor Technology Technology progress in IC design and semiconductor manufacturing has resulted in circuits with more functionality at lower... make a circuit unusable A new aspect for digital designers is the occurrence of essential variations not only from die to die but also within a die Therefore, inter-die and intra-die variations have to be taken into account not only in the design of analog circuits as already done, but also in the digital design process The great challenge is to assure the functionality of high complex digital circuits... distinguished between variations from die-to-die and variations within a die They are called inter-die and intra-die variations, respectively The inter-die variations impact all devices and interconnects of a die in (nearly) the same way We will try to describe them using correlated random variables, whereas intra-die variations can be described by uncorrelated or weak spatial correlated random variables... between technological variations, parameter sensitivities, and variations of model parameters will be investigated In addition, this section will outline the impact of variations of transistor parameters on the variations of delay times and energy consumption of a circuit Section 2.2 introduces statistical methods for describing and analyzing variations which are important for an understanding of approaches... lutz.muche@eas.iis.fraunhofer.de; joachim.haase@eas.iis.fraunhofer.de M Dietrich and J Haase (eds.), Process Variations and Probabilistic Integrated Circuit Design, DOI 10.1007/978-1-4419-6621-6 2, © Springer Science+Business Media, LLC 2012 11 12 B Lemaitre et al The section is going to explain how to describe univariate and multivariate normal distributed random variables as well as non-Gaussian distributions Additionally,... IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27(4), 589–607 (2008) DOI 10.1109/TCAD.2007.907047 25 Graeb, H., Mueller, D., Schlichtmann, U.: Pareto optimization of analog circuits considering variability In: 18th European Conference on Circuit Theory and Design ECCTD 2007, pp 28–31 (2007) DOI 10.1109/ECCTD.2007.4529528 Chapter 2 Physical and Mathematical Fundamentals Bernd... circuits with respect to physical, technological, and economic boundary conditions In order to evaluate design solutions within an acceptable time and with acceptable efforts the methods applied in the design process must support the analysis of design solutions as accurate as necessary and as simple as possible As a result, the expected yield will be achieved and circuits can be manufactured economically... technology innovations and device architectures as strained silicon, silicon-on-insulator, very high mobility devices, and for instance trigate transistors have been developed (see more information, for instance, in [6, 9, 12]) 1.3 Impact on the Design Process 1.3.1 An Example Concerning Inter-Die and Intra-Die Variations Let us discuss the impact of parameter variations on the design process with the help... and mathematical methods to handle statistical design tasks Chapter 3 gives a description of the sources of variability and their representations Chapter 4 demonstrates typical methods used for the investigations of the impact of variations on the performance of a design In Chap 5, some application examples will show how to make a good choice under the available methods and apply them for special designs... in BSIM4 and PSP IEEE Design Test of Computers 27(2), 26–35 (2010) DOI 10.1109/MDT.2010.2 18 Zhao, W., Liu, F., Agarwal, K., Acharyya, D., Nassif, S., Nowka, K., Cao, Y.: Rigorous extraction of process variations for 65-nm CMOS design IEEE Transactions on Semiconductor Manufacturing 22(1), 196–203 (2009) 19 Orshansky, M., Nassif, S., Boning, D.: Design for Manufacturability and Statistical Design Springer . alt="" Process Variations and Probabilistic Integrated Circuit Design Manfred Dietrich • Joachim Haase Editors Process Variations and Probabilistic Integrated Circuit. manfred.dietrich@eas.iis.fraunhofer.de M. Dietrich and J. Haase (eds.), Process Variations and Probabilistic Integrated Circuit Design, DOI 10.1007/978-1-4419-6621-6 1, ©