digital logic design lecture notes download
Digital logic design
Ngày tải lên :
27/03/2014, 20:00
... Computer Engineering
ECE380 Digital Logic
Introduction to Logic Circuits:
Design Examples
Dr. D. J. Jackson Lecture 5-2Electrical & Computer Engineering
Design examples
ã Logic circuits provide ... Logic
Introduction to Logic Circuits:
Synthesis using AND, OR, and
NOT gates
Dr. D. J. Jackson Lecture 4-2Electrical & Computer Engineering
Example logic circuit design
ã Assume we want to design a logic ... AND logical AND
–OR logical OR
– NOT logical NOT
– NAND, NOR, XOR, XNOR (covered later)
ã Assignment operator <=
A variable (usually an output) should be assigned the result
of the logic...
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Digital Logic and Microprocessor Design ppt
Ngày tải lên :
17/03/2014, 17:20
... to reduce a Boolean equation
Digital Logic and Microprocessor Design with VHDL Chapter 2 - Digital Circuits
51
Digital Logic and
Microprocessor Design
With VHDL
Enoch ... IEEE.STD _LOGIC_ 1164.all;
ENTITY NOR3gate IS PORT (
x: IN STD _LOGIC;
y: IN STD _LOGIC;
z: IN STD _LOGIC;
f: OUT STD _LOGIC) ;
END NOR3gate;
ARCHITECTURE Dataflow OF NOR3gate IS
SIGNAL xory, xoryorz : STD _LOGIC;
BEGIN
xory ...
duals
equivalent
equivalent
inverse
Digital Logic and Microprocessor Design with VHDL Chapter 2 - Digital Circuits
43
the focus is on the design of the digital circuitry of the microprocessor,...
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Digital Logic and Microprocessor Design With VHDL potx
Ngày tải lên :
19/03/2014, 21:20
... STD _LOGIC;
o: OUT STD _LOGIC) ;
END COMPONENT;
COMPONENT and3gate PORT(
i1, i2, i3: IN STD _LOGIC;
o: OUT STD _LOGIC) ;
END COMPONENT;
COMPONENT or2gate PORT(
i1, i2: IN STD _LOGIC;
o: OUT STD _LOGIC) ;
END ... IEEE.STD _LOGIC_ 1164.all;
ENTITY Siren IS PORT (
M: IN STD _LOGIC;
D: IN STD _LOGIC;
V: IN STD _LOGIC;
S: OUT STD _LOGIC) ;
END Siren;
ARCHITECTURE Dataflow OF Siren IS
SIGNAL term_1, term_2, term_3: STD _LOGIC;
BEGIN
term_1 ... Next-state logic
State memory
Output logic
Combinational circuit
Sequential circuit
Transistor level design
Gate level design
Register-transfer level design
Behavioral level design...
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design course vlsi lecture notes ch2
Ngày tải lên :
28/04/2014, 11:04
... from 5V to 1V
Logic Levels
all voltages between 0V and VDD
– Logic ‘1’ = VDD
– Logic ‘0’ = ground = 0V
+
-
VDD
VDD
=
CMOS
logic
circuit
CMOS
logic
circuit
V
VDD
logic 1
voltages
logic 0
voltages
undefined
... Prof. A. Mason Lecture Notes Page 2.25
Structured Logic
ã Recall CMOS is inherently Inverting logic
ã Can used structured circuits to implement general logic
functions
ãAOI:implements logic function ... 0
x
x
y
g(x,y) = x + y
ECE 410, Prof. A. Mason Lecture Notes Page 2.15
nMOS Logic Gates
ã We will look at nMOS logic first, more simple than CMOS
ã nMOS Logic (no pMOS transistors)
assume a resistive...
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design course vlsi lecture notes ch3-5
Ngày tải lên :
28/04/2014, 11:04
... 10
14
cm
-3
)
Wafer Growth
Part III: Fabrication
ECE 410, Prof. A. Mason Lecture Notes Page 3.27
Design Rules: Intro
ãWhy have Design Rules
fabrication process has minimum/maximum feature sizes that ... III: Fabrication
ECE 410, Prof. A. Mason Lecture Notes Page 3.50
CMOS Fabrication Sequence
ã view LOCOS slide show
ECE 410, Prof. A. Mason Lecture Notes Page 3.16
Upper CMOS Layers
ã Cover ... avoid breaks in higher level cells
Part II: Layout Basics
ECE 410, Prof. A. Mason Lecture Notes Page 3.30
Design Rules: 3
ã Contacts
Contacts to Metal1, from Active or Poly
ã use same layer...
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vlsi design course lecture notes ch6
Ngày tải lên :
28/04/2014, 11:04
... nMOS)
2
1
2
⎥
⎦
⎤
⎢
⎣
⎡
=
A
s
d
qN
x
εφ
depletion
region
Q
B
, bulk
charge
electron
layer, Qe
ECE 410, Prof. A. Mason Lecture Notes 6.31
Junction Areas
ã Note: calculations assume following design rules
–poly size, L = 2λ
– poly space to contact, 2
contact ... sb
gv
mgs
r
o
C
gs
C
gb
C
sb
C
db
C
gd
Gate
Drain
Source
Body (Bulk)
ECE 410, Prof. A. Mason Lecture Notes 6.3
Conduction in Semiconductors
ã doping provides free charge carriers, alters conductivity ... constant
but is a function of
Temperature and Doping
Concentration
ECE 410, Prof. A. Mason Lecture Notes 6.10
Capacitance in MOSFET Capacitor
ã In Accumulation
Gate capacitance = Oxide capacitance
...
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design course vlsi lecture notes ch7
Ngày tải lên :
28/04/2014, 11:04
... transitions for each of these cases
ECE 410, Prof. A. Mason Lecture Notes 7.28
Sizing in Complex Logic Gates
ã Improving speed within a single logic gate
ã An Example: f=(a b+c d) x
ãnMOS
discharge ... Cutoff
+
V
GSn
-
+
V
SGp
-
Vin < V
IL
input logic LOW
Vin > V
IH
input logic HIGH
ãDrain Voltage, f(Vout)
–V
DSn
=Vout, V
SDp
=VDD-Vout
ECE 410, Prof. A. Mason Lecture Notes 7.21
NOR: DC Analysis
ã Similar ... 0 V
Logic Swing
Max swing of output signal
ãV
L
= V
OH
-V
OL
ãV
L
= VDD
ECE 410, Prof. A. Mason Lecture Notes 7.4
Noise Margin
ãInput Low Voltage, V
IL
– Vin such that Vin < V
IL
= logic...
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design course vlsi lecture notes ch11
Ngày tải lên :
28/04/2014, 11:04
... Q to logic 1
–Reset: forces Q to logic 0
Logic Diagrams
DFFR
ãwith Reset (clear)
DFFRS
ãwith Reset (clear) and Set
X
10
0
0
1
X
1
0
X
Alternate logic structure
ECE 410, Prof. A. Mason Lecture ... 2
1
ECE 410, Prof. A. Mason Lecture Notes 11.7
Transmission Gate Multiplexors
ã Logical Function of a Multiplexor
– select one output from multiple inputs
2:1 MUX logic
ã CMOS Multiplexors
generally ... Mason Lecture Notes 11.30
C
2
MOS D Flip Flop
ãCascade 2 C
2
MOS Latches
switch clock phases of master and slave blocks
VDD
Φ
D
Q
ΦΦ’
Φ’
QB
Master
Slave
ECE 410, Prof. A. Mason Lecture Notes...
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vlsi design course lecture notes ch12
Ngày tải lên :
28/04/2014, 11:04
... 410, Prof. A. Mason Lecture Notes 12.15
CLA in Advanced Logic Structures
ã CLA algorithm better implemented in dynamic logic
ãDynamic Logic
(
jump to next slide
)
ã Dynamic Logic CLA Implementation
... ECE 410, Prof. A. Mason Lecture Notes 12.24
16b Adder Using 4b CLA Blocks
ã Create SUMs from outputs of this circuit
ECE 410, Prof. A. Mason Lecture Notes 12.16
Dynamic Logic –Quick Look
ã Advantages: ... write
FA
+
a
i
full-adder symbol
b
i
c
i
c
i+1
s
i
ECE 410, Prof. A. Mason Lecture Notes 12.31
Arithmetic /Logic Unit Structure
ã ALU performs basic arithmetic and logic
functions in a single block
– core unit in a microprocessor
ã...
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vlsi design course lecture notes ch13
Ngày tải lên :
28/04/2014, 11:04
... Data Out
ECE 410, Prof. A. Mason Lecture Notes 13.32
Programmable Logic Arrays
ã Programmable Logic Array: PLA
– circuit which can be programmed to provide various logic
functions
ã Example: Sum-of-Products ... bit
ECE 410, Prof. A. Mason Lecture Notes 13.27
ROM Array Layout
ã very regular layout
ã high packing density
one txfor each
data point
ECE 410, Prof. A. Mason Lecture Notes 13.14
Column Circuitry
ã ... options for ECE410 Design Project
Two ports
ã 1 port read and write
ã 1 port read only
Three ports
ã 2 ports for read and 1 port for write
ECE 410, Prof. A. Mason Lecture Notes 13.4
SRAM Bit...
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vlsi design course lecture notes exam2 review
Ngày tải lên :
28/04/2014, 11:04
... bx + c = 0ặ
a
acb
b
x
2
4
2
=
DeMorgans Rules
(a * ’ = a’ + b’
(a + b)’ = a’ * b’
Useful Logic Properties
x
0 * x = 0
x * x’ = 0
* a = a a + a = a
oven
+bc + a'b = a + b
=...
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vlsi design course lecture notes exam-example
Ngày tải lên :
28/04/2014, 11:04
... CMOS logic circuits will contain parallel nMOS transistors?
A) NOR B) Transmission Gate
C) NAND D) Inverter
14. Which of the following CMOS gates can be implemented using AOI structured logic? ... industry?
A) can get more CMOS gates in same chip area B) CMOS gates are faster than any other logic structures
C) silicon is an expensive material D) CMOS physics is complex to understand
...
Pol
y
Active
0. 1 mà
0. 8 mà
0.2 mà
1. 5 mà
1.5 mà
Channel
ECE 410, Exam 1 Fall 2002
5
23. CMOS Logic: 12 points
a) Reduce the following function to a form that can be implemented in CMOS with...
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vlsi design course lecture notes guide-410-setup-pc
Ngày tải lên :
28/04/2014, 11:04
... provides step-by-step instructions for setting up your ECE 410 class directory to use
the Cadence design tools. It also shows the steps you will have to complete each time you want to
run Cadence...
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vlsi design course lecture notes guide-410-unixtips
Ngày tải lên :
28/04/2014, 11:04
... is type “runcad” at the command prompt to launch icfb from your
class directory (assuming your design directory matches the example).
Running a Script
Scripts are a collection of commands...
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