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(30 hours) CÔNG NGH VI Đi N TỆ Ệ Ử (Microelectronic Technology) Ch ng 8: Basic Design ươ Slide 2 N i dungộ Concepts Multiplexers Encoders Priority Encoders Decoders Comparators BCD to 7 SEGMENT ALUs Slide 3 Module General definition module module_name ( port_list ); port declarations; … variable declaration; … description of behavior endmodule Example module HalfAdder (A, B, Sum Carry); input A, B; output Sum, Carry; assign Sum = A ^ B; //^ denotes XOR assign Carry = A & B; // & denotes AND endmodule Slide 4 Description Styles Structural: Logic is described in terms of Verilog gate primitives Execution: Concurrent Example: not n1(sel_n, sel); and a1(sel_b, b, sel_b); and a2(sel_a, a, sel); or o1(out, sel_b, sel_a); sel b a out sel_n sel_b sel_a n1 a1 a2 o1 Slide 5 Description Styles (cont) Dataflow: Specify output signals in terms of input signals Uses continuous assignment statement – Format: assign net = expression; All continuous assignment statements execute concurrently Order of the statement does not impact the design Example: assign out = (sel & a) | (~sel & b); sel b a out sel_n sel_b sel_a Slide 6 Description Styles (cont.) Behavioral: Algorithmically specify the behavior of the design Example: if (select == 0) begin out = b; end else if (select == 1) begin out = a; end a b sel out Black Box 2x1 MUX Slide 7 Behavioral Modeling (cont.) always statement : Sequential Block Sequential Block: All statements within the block are executed sequentially When is it executed? – Occurrence of an event in the sensitivity list – Event: Change in the logical value Statements with a Sequential Block: Procedural Assignments Slide 8 Procedural Constructs Two Procedural Constructs – initial Statement – always Statement initial Statement : Executes only once always Statement : Executes in a loop Example: … initial begin Sum = 0; Carry = 0; end … … always @(A or B) begin Sum = A ^ B; Carry = A & B; end … Slide 9 Event Control Slide 10 Combinational Logic Combination logic function can be expressed as: logic_output(t) = f(logic_inputs(t)) Combinational Logic Combinational Logic logic_inputs(t) logic_outputs(t) Combinational logic can be implemented with concurrent and sequential statements. Concurrent statements are used in dataflow and structural descriptions. Sequential statements are used in behavioral descriptions. [...]... statements vs Sequential statements Slide 11 MUX 2-1 Strutural/gate level Data flow module mux2to1 (m, x, y, s); input x, y, s; output m; wire m; assign m = (~s & x) | (s & y); endmodule Slide 12 MUX 2-1 Behavior Slide 13 System Tasks Display tasks – $display : Displays the entire list at the time when statement is encountered – $monitor : Whenever there is a change in any argument, displays the entire list