Chapter Summary, conclusion and outlook 9.1 Summary Graphene is a very promising material for both fundamental physics studies and many novel device applications. As an atomic layer thick two-dimensional crystal, graphene’s various properties are strongly affected by its surrounding media and substrate. Utilizing ferroelectric dielectrics, we have experimentally demonstrated graphenebased non-volatile memory devices, flexible transparent conductors and novel type of transistors. The key difference between ferroelectric and other types of dielectrics is that they guarantee the devices with low power consumption and high efficiency behavior. Ferroelectric dielectrics allow allows the devices to function continuously even after the power is turned off, making it quite desirable for the next generation zero-power consumption electronics. For the graphene-ferroelectric non-volatile memory devices proposed in this thesis, writing and reading speed is determined by the switching time of the ferroelectric materials, which can be as fast as 100 ps. In addition, this non-volatile memory has 109 110 an aggressive scaling ability. This makes the proposed graphene-ferroelectric nonvolatile memory devices a very promising candidate for flexible electronics and data storage. To further understand the charge transport of graphene on ferroelectric dielectrics, we further introduced a quantitative way to determine and control the hysteresis ferroelectric gating by using an independent linear dielectric gating for reference. Moreover, this reference gating can also be used to control ferroelectric gating by introducing a unidirectional shift in the hysteretic ferroelectric doping in graphene. Using this idea, we further realized the symmetric bit writing in graphene which directly uses remnant polarization with high speed and simplicity. For all of its potential applications, graphene must be both high quality and producible on a large-scale. The technical breakthrough in synthesizing graphene using chemical vapor deposition (CVD) method addressed the large-scale request and many prototypes of graphene-based applications have been developed. However, the quality of the CVD graphene is still generally lower than mechanically exfoliated graphene. This implies that there are other unknown aspects of CVD graphene to be further explored. Here, we show that the current growth and transfer methods of CVD graphene lead to quasi-periodic nanoripple arrays in graphene. Such high density NRAs partially suspend graphene giving rise to flexural phonon scattering. This not only causes anisotropy in charge transport, but also sets limits on both the sheet resistance and the charge mobility even in the absence of grain boundaries. At room temperature, NRAs are likely to play a limiting role also for the mobility of ultra-clean samples, in particular when the graphene sheets are transferred onto ultraflat BN substrates. Optimization and improvement of large-scale graphene synthesis 111 still remains a critical issue. By introducing a ferroelectric thin film, we have demonstrated a new method to simultaneously dope and support large-scale CVD graphene without compromising graphene’s high transparency. The proposed graphene-ferroelectric hybrid transparent conductor exhibits low sheet resistance (120 Ω/✷) at room temperature, high optical transparency (> 95 %) in the visible range spectrum and excellent mechanical flexibility. In addition, we show that low sheet resistance of 50 Ω/✷ at optical transparency > 95 % in large-scale graphene-ferroelectric hybrid structure is achievable through the optimization of existing graphene transfer processes. Furthermore, we reported a new route to exploring graphene physics and functionalities by transferring large-scale CVD graphene and bilayer graphene to functional substrates. Using ferroelectric Pb(Zr0.3 Ti0.7 )O3 (PZT), we demonstrated ultra-lowvoltage operation of graphene field effect transistors within ± V with maximum doping exceeding 1013 cm−2 and on-off ratios larger than 10 times. After polarizing PZT, the switching of graphene field effect transistors is characterized by pronounced resistance hysteresis, suitable for ultra-fast non-volatile electronics. 9.2 9.2.1 Unsolved questions Can we reach the VHS regime? Pushing the Fermi level to the VHS regime is one of the main goals in ferroelectric inorganic substrate PZT gated GFET devices. Theoretically, large remnant polarization of ferroelectric inorganic substrate would provide enough electrostatic doping to 112 achieve this goal. However, up till now we have not reach the VHS regime experimentally. The reasons are summarized in the following: The interface between PZT and graphene is dirty. Currently, we are using CVD graphene as the working media. This will inevitably involve other sources in graphene, i.e., water, copper etching solvent residual, copper nanoparticles. These additional materials will influence the charge transport properties of graphene and decrease the gate efficiency, leading to a saturated resistivity character in graphene beyond a certain doping level. Besides this, both CVD graphene and PZT substrate are polycrystal. For CVD graphene, this implies that vacancies, defects and, grain boundaries reside within, influencing the electrical properties of graphene. For polycrystal PZT substrate, this indicates that the remnant polarization is not as large as its single crystal counterpart. To reach the VHS regime, we might suggest the following. Utilize epitaxial or even single crystal ferroelectric inorganic substrate, such as PZT or BFO. The ultra-high remnant polarization will provide one of the highest levels of electrostatic doping in graphene, up to 1.25×1015 cm−2 . Obtaining a clear interface is also critical for the success this experiments. Directly grow a thin ferroelectric layer on graphene is one possible method. However, a fine-tuned growth approach is required in order to reduce the induced defect in graphene. One can also utilize the dry transfer method as already demonstrated in several graphene and Boron Nitride experiments [116]. 113 9.2.2 Can we completely remove the quasi-periodic nanoripples? In chapter 5, we proved that the origin of quasi-periodic nanoripples was the copper step edges. Thus, in order to remove the quasi-periodic nanoripples, the starting point should be the optimization of copper foils. In this regard, we would also like to reiterate that the pre-growth annealing and the actual growth at high temperature growth (1000-1050 o C) are both crucial for producing large-scale high quality CVD graphene. The former removes the surface oxidation layer, while the latter ensures that Cu catalyzes graphene growth instead of forming intermediate chemical compounds with incoming gases. However, the step edges will form even if one leaves the pre-annealing step out. The high temperature process makes high density single-crystal terraces and step edges a ubiquitous surface morphology in Cu. CVD graphene growth follows the Cu surface morphology, but as the sample is cooled the difference in thermal expansion coefficients leads to “excess” graphene and also strain, which is accumulated at the step edges. The current wet transfer methods, either polymer resist-based or thermal release tape-based, transfer this surface morphology to the target substrates, leading to the formation of quasi-periodical NRAs once the resist/polymer/tape is removed. The large-scale transfer without any support should avoid the NRAs altogether and be in principle scalable. However, such an approach introduces a very high density of wrinkles and hence, would actually make the situation worse (not shown). The Cu foil after graphene growth is etched in an Ammonium Persulfate (APS) solution without any protective/supporting PMMA layer. After 24 hours, the graphene floats freely on the surface. Note that the usual rinsing step in DI water had to be minimized 114 to ensure a greater chance of success. We can already observe a much higher density of micron-size wrinkles of random orientation. These extra features are due to the absence of a supporting (PMMA) layer, making CVD graphene very sensitive to the flow and fluctuations of water and its surface tension. In light of the high wrinkle density and the fact that in such samples residues from the etchant are ubiquitous, we have not characterized these samples with AFM. Avoiding the formation of NRAs is the more direct strategy to realize the ideal properties of graphene. This can be realized by surface engineering of Cu, specifically in terms of roughness and crystal orientations. A few possible strategies for future studies are listed below. This is a long term goal for the larger community working towards graphene-based applications, some of which require low sheet resistances, e.g. displays and solar cell panels. i) Low temperature CVD growth method Currently, the high temperature CVD method provides the best quality CVD graphene with unparalleled uniformity, grain size, and scalability. Unfortunately, with this approach Cu step edges are unavoidable even if we skip the pre-annealing steps because the Cu foils are self-annealed during the growth at T ∼ 1,000 o C. By lowering the growth temperature below ∼ 800 o C, it is possible to reduce/minimize the formation of Cu step edges, but in this case we introduce new challenges specific to the low T growth, e.g. just to name a few: 1) insufficient Cu catalytic activity limits the graphene growth from gaseous source 2) much enhanced D peak signal present using solid carbon sources growth approach. We, as well as others, observe more defects in Raman spectra. Therefore, in the long run one may potentially have to find a compromise between ripple and defect control. 115 ii) Substrate engineering Due to the direct relation between quasi periodic NRAs with Cu step edges, the most useful and elegant way to eliminate NRAs in CVD graphene is by using ultra-flat Cu foil for CVD graphene growth. Preliminary studies of graphene from flat areas seem to indicate that they also have better mobility (not shown). Another possibility is that the lower surface energy of Cu(111) surface can be utilized to prepare more flat Cu surfaces. It is also reported that graphene grown on Cu(111) surfaces show better quality because the Cu(111) lattice matches well with graphene. We note that the electroplated Cu surface prefers the Cu(111) surface, which will be further investigated in a separate study. iii) Improvement of the way Cu foils are prepared There can be also larger ripples (generally referred to as wrinkles and folds) formed by micro-scale bumps on Cu foils prepared by a roll-press process. These also lead to a partial suspension and hence, are a source of flexural phonon scattering. Thus, controlling the quality of the rolls used in the roll-press process may at least help avoid the partial suspension due to “Wrinkle” formation. The formation of these macroscopic ripples can be suppressed by using electrochemically or mechanically polished Cu surfaces. 9.2.3 Can we achieve less than 100 Ω/✷ sheet resistance in CVD graphene? In chapter 6, we showed that one of the lowest sheet resistance values achieved in large-scale single layer CVD graphene (120 Ω/✷) without compromising its optical transparency was found using ferroelectric polymer gating. Although it is already 116 useful for some of the applications in optoelectronics, it is still higher than the industrial requirement of 100 Ω/✷. Consequently, the question of how to achieve less than 100 Ω/✷ sheet resistance in CVD graphene would becomes one of the most important goals for subsequent work. In order to so, there are several aspects one needs to keep in mind. Firstly, the optimization of CVD graphene growth and transfer technique is important because its enhanced carrier mobility will dramatically reduce the sheet resistance value. Beyond this, optimizing the synthesis of ferroelectric polymer thin film is also critical. This will not only reduce the non-ferroelectric phase present in our current specimens, but also possibly enhance the electrostatic doping level in graphene. By doing so, it is very likely that less than 100 Ω/✷ sheet resistance in CVD graphene will be achieved in the future. 9.3 Future outlook In this section, I will only focus on potential research topics involving graphene and ferroelectric material. 9.3.1 Gate-tunable graphene-ferroelectric photonics Over the past seven years, the main focus of graphene research has been its electronics properites. However, graphene is also reported to possess intriguing optical properties. Many proof-of-concept ideas and devices have emerged, ranging from graphene solar cells, organic light emitting diodes and saturable absorbers in ultrafast laser systems. However, research in this direction is still in an early stage. 117 Currently, graphene has been used as a saturable absorber in ultrafast laser systems. This is because graphene has obvious non-linear optical properties, which is essential for its applications in photonics. Under strong light illumination, the optical transparency of graphene tends to saturate due to the universal optical absorption and zero band gap. However, all of the present studies are entirely focused on pristine graphene with a fixed charge carrier density. A gate tunable graphene-based saturable absorber would be more intriguing, not only for its applications, but also to explore its underlying physics in terms of light-matter interactions. From the applications point of view, the highly doped graphene would consume a much less power and provide highly efficient saturable absorber devices. 9.3.2 Piezoelectric effect induced electrical nanogenerator In our studies, we are mainly utilizing the ferroelectric properties of P(VDF-TrFE). Meanwhile, P(VDF-TrFE) also has a pronounced piezoelectric effect [161]. This will add one more degree of freedom in tuning the charge transport of graphene and holds promise in fabricating new type of functional devices. Currently, the prototype of electrical nanogenerators is utilizing metals such as Au or Pt as electrodes. Although Au is an excellent conductor, it is not suitable for repeated bending and stretching. On the other hand, graphene is an excellent transparent conductor, and would greatly enhance its mechanical stability and durability. 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(Proceedings of the International Conference on Graphene Research Progress, Singapore, 2010 ). 5. ”Gate-controlled nonvolatile graphene-ferroelectric memory”, Yi Zheng, Guang-Xin Ni, Chee-Tat Toh, Ming-Gang Zeng, Shu-Ting Chen, ¨ Kui Yao, Barbaros Ozyilmaz, Appl. Phys. Lett. 94, 163505 (2009). (Proceedings of the International Conference on Graphene Research Progress, Korea, 2009 ). 6. ”A new route to graphene layers by selective laser ablation”, S. Dhar, A. Roy Barman, G. X. Ni, X. Wang,X. F. Xu, Y. Zheng, S. Tripathy, ¨ Ariando, A. Rusydi, K. P. Loh, M. Rubhausen, A. H. Castro Neto, B. Ozyilmaz, and T. Venkatesan,, AIP ADVANCES 1, 022109 (2011). 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