MEASUREMENT SETUP 343 fref x f sample Figure 11.5 Block diagram of dual reference and sample analogue mixing circuit sensor and reference oscillators, producing some degree of baseline offset. Although the mixing circuit technique will significantly reduce the effects of common mode interfer- ence, there is always the possibility that interference could compound and, therefore, increase measurement errors. Another option is to use an environmentally isolated precision reference oscillator. As the frequency from this protected reference oscillator will remain fixed, the mixed frequencies from the reference and indicator sensor oscillator will not contain frequency contributions from any interfering source (Crabb and Lewis 1973). 11.8 MEASUREMENT SETUP The vector network analyser and associated calibration techniques make it possible to accurately measure the transmission parameters of the devices under test. The measure- ment schematic is shown in Figure 11.6. The network analyser consists of a synthesized sweeper (10 MHz-40 GHz), test setup (45 MHz-40 GHz), HP8510B network analyser, and a display processor (Subramanian 1998; Piscotty 1998). The sweeper provides the stimulus and the test setup provides signal separation. The display panel of the HP8510B is used to define and conduct various measurements. The system bus is instrumental in controlling various other instruments. The device to be tested is connected between the test Port 1 and Port 2. The point at which the device is connected to the test setup is called the reference plane. All measurements are made with respect to this reference plane. The measurements are expressed in terms of the scattering parameters referred to as S parameters (Subramanian 1998). These describe the signal flow within the network. S parameters are defined as ratios and are represented by S inn / out, where the subscripts in and out refer to the input and output signal, respectively. Figure 11.7 shows the energy flow in a two-port network. It can be shown that (see HP 8510B Network Analyser Manual 1987) b 1 = a 1 S 11 = a 2 S 12 and b 2 = a 1 S 21 = a 2 S 22 (11–2) where S 11 is b\la\ and 5 21 is b 2 la 1 when a 2 is zero; 5 12 is b\la 2 and 522 is b 2 /a 2 when a\ is zero. S\\ and 5 21 (5i2 and 522) are the reflection and transmission coefficients for Port 1(2), respectively. 344 IDT MICROSENSOR PARAMETER MEASUREMENT Synthesized sweeper 0.01–40 GHz HP 8510B Network analyzer Test set 0.045-40 GHz Port l Coaxial cable Port 2 Power Macintosh 6100/66 HP plotter Apple laser printer Sample holder with SAW device T101 T101 Coaxial cable 1 1 Figure 11.6 Schematic of measurement setup s 11 1 S 21 S 12 i S 22 H Figure 11.7 Signal flow of a two-port network 11.9 CALIBRATION Calibration of any measurement is essential in order to ensure the accuracy of the system. The errors that exist in systems may be random or systematic. Systemic errors are the most significant source of measurement uncertainty. These errors are repeatable and can be measured by the network analyser. Correction terms can then be computed from these measurements. This process is known as calibration. Random errors are not repeatable and are caused by variations due to noise, temperature, and other environmental factors that surround the measurement system. REFERENCES 345 A series of known standards are connected to the system during calibration. The systemic effects are determined as the difference between the measurand and the known response of the standards. These errors can be mathematically related by solving the signal-flow graph (Subramanian 1998). The frequency response is the vector sum of all test setup variations in magnitude and phase and the frequency. This is inclusive of all signal-separation devices, such as test setup and cabling. The mathematical process of removing errors is called error correction. Ideally, using perfectly known standards, these errors should be completely characterised. The measure- ment system is calibrated using the full two-port calibration method. The four standards that are commonly used are shielded open circuit, short circuit, load, and through. This method provides full correction of directivity, source match, reflection and transmission- signal path, frequency response, load match, and isolation for S 11 , S 12 , S 21 , and S 22 . The procedure involves taking a reflection, transmission, and isolation measurement. For the reflection measurement (S 11 , S 22 ), the open, short, and load standards are connected to each port in turn and the frequency response is measured. These six measure- ments result in the calculation of the reflection error coefficients for both ports. For the transmission measurement, the two ports are connected and the following measurements are carried out forward through transmission (S21 -frequency response), forward through match (S21-load), reverse through transmission (S 12 -frequency response), and reverse through match (S 12 -load). The transmission error coefficients are computed from these four measurements. Loads are connected to the two ports and the S 12 and S 21 noise floor level is measured. From these measurements, the forward and reverse-isolation error coefficients are computed. The calibration is saved in the memory of the network analyser and the correction is turned on to correct systemic errors that may occur. By making these measurements, it is possible to identify the critical acoustic parameters and thus design the optimal IDT-SAW microsensor. The SAW microsensor may now be fabricated, and the process is provided in the following chapter. REFERENCES Avramov, I. D. (1989). Analysis and design aspects of SAW-delay-line-stabilised oscillators, Proceedings of the 2nd Int. Conf. on Frequency Synthesis and Control, London, April 10–13, pp. 36-40. Campbell, C. (1998). Surface Acoustic Wave Devices and their Signal Processing Applications, Academic Press, London. Crabb, J. and Lewis, M. F. (1973). "Surface acoustic wave oscillators: mode selection and frequency modulation," Electronics Lett., 9, 195–197. Gangadharan, S. (1999). Design, development and fabrication of a conformal Love wave ice sensor, MS thesis, Pennsylvania State University, USA. Grate, J. W., Martin, S. J. and White, R. M. (1993). "Acoustic wave microsensors, Parts I and II," Anal. Chem., 65, 940–948, 987–996. HP 8510B Network Analyzer Manual (1987). Hewlett-Packard Company, Santa Rosa, Calif. Piscotty, D. J. (1998). 150 MHz wireless detection of a ST-cut quartz substrate surface acoustic wave device, MS thesis, Pennsylvania State University, USA. Shiokawa, S. and Moriizumi, T. (1988). Design of SAW sensor in liquid, Proc. of 8th Symp. on Ultrasonic Electronics, Tokyo, July, pp. 142–144. 346 IDT MICROSENSOR PARAMETER MEASUREMENT Smith, W. R. and Gerard, H. M. (1971). "Differences between in-line and cross-field three-port circuit models for integrated transducers," IEEE Trans. Microw. Theory Techniques, 19,416-417. Smith, W. R. et al. (1969). "Analysis of interdigital surface wave transducers by use of an equiv- alent circuit model," IEEE Trans. Microw. Theory Techniques, 16, 856–864. Subramanian, H. (1998). Experimental validation and design of wireless microaccelerometer, MS thesis, Pennsylvania State University, USA. Wohltjen, H. and Dessy, R. (1979). "Surface acoustic wave probe for chemical analysis," Anal. Chem., 51,471–477. 12.1 INTRODUCTION Surface acoustic wave (SAW) devices are fabricated using processes that have been primarily developed for integrated circuit (1C) technology in the microelectronics industry. In this chapter, we describe all the steps required to fabricate an interdigital trans- ducer (IDT) SAW microsensor from a stable temperature (ST) cut quartz wafer. A basic overview of this process is given in Figure 12.1. Specifically, there are two processes that are commonly used to define the IDTs: etching and lift-off (Hatzakis et al. 1980). Both methods 1 are suitable for the fabrication of IDT-SAW delay-line sensors, but the ultimate choice of either the etching or the lift-off process mainly depends on the minimum feature size (resolution and accuracy) of the patterned structure required. Although the etching procedure is relatively easy to realise and acceptable resolution is achievable, it is more susceptible to electrical shorts between features than that of the lift-off process. This is a major concern, especially for minimum feature sizes approaching 1–2 um, where the influ- ence of contaminants, such as large dust particles, becomes more significant (Vellekoop 1994). However, for larger minimum feature sizes, of 5 um or greater, it is recognised that the etching process is acceptable and comparable in terms of device fabrication yield and quality to that of the lift-off process. Section 12.2 provides full details of the steps required to make an IDT microsensor through either an etching process or a lift-off technique. The process given here is meant to serve as an example, and variations in the precise choice of materials and equipment used will vary from laboratory to laboratory. Next, the steps required to make a Rayleigh-SAW microsensor from the IDTs are shown, together with a waveguiding layer of SiO 2 (Section 12.3) to fabricate a Love wave microsensor. Finally, in Section 12.4, we provide tables that summarise the etching and lift-off processes and present their relative merits. 12.2 SAW-IDT MICROSENSOR FABRICATION 12.2.1 Mask Generation SAW-IDT designs are written onto square, low-expansion glass plates using a process of electron-beam (E-beam) lithography. The SAW designs are first created using a 1 Pattern transfer and etching methods were introduced in Chapter 2. 12 IDT Microsensor Fabrication 348 IDT MICROSENSOR FABRICATION Figure 12.1 Overview of process required to fabricate Rayleigh wave and Love wave IDT microsensors computer-aided design (CAD) system (e.g. L-Edit from Tanner Tools Inc.) and then the electronic design files are exported in a standard format (e.g. GDS II) that offers compatibility with the E-beam writer. The IDT structures are thus written on a positive resist material that coats the mask plate on which a thin chromium layer has already been deposited. The resist is developed and the chrome is etched away to leave the desired IDT structures. It is common practice to make an inverse mask, or negative, from the master positive mask plates using a quicker and more inexpensive ultraviolet (UV) optical lithographic process. It is these copies that are then used in the silicon run and, if damaged, can be replaced immediately. Figure 12.2 shows a typical IDT design that would be written onto the positive and negative mask plates. 12.2.2 Wafer Preparation Effective cleaning of the quartz wafers is a vital procedure, which is an essential require- ment for the successful fabrication of IDT microsensors. In order to obtain good adhesion and a uniform coating of the metallic film used to make the IDTs, a thorough cleaning of SAW-IDT MICROSENSOR FABRICATION 349 Figure 12.2 Basic layout of a photolithographic mask plate showing an IDT structure: (a) positive and (b) negative fields the wafer surface is essential. The cleaning of the wafers should be performed in a fume cupboard (in a clean room) to allow the safe and fast removal of any possible harmful fumes produced during the cleaning process (Campbell 1998; Atashbar 1999). The wafers are initially cleaned of any surface contaminants, such as dust, grease, or any other soluble organic particles, by immersion in trichloroethylene 2 at 60 °C for 10 minutes, followed by an acetone bath at 60 °C for 10 minutes. The wafers are then rinsed with methanol and finally with deionised water. It is best to avoid the use of nitrogen gas for drying the sample during the aforementioned procedure so as to minimise further surface contaminants. Instead, a slow evaporation in a protected fume cupboard is employed. Further cleaning is then undertaken for the removal of the more obstinate contaminants. The wafers are immersed in a mixture of three parts of deionised water (3H 2 O), one part ammonium hydroxide (NH 4 OH), and one part of 30 percent unsta- bilised hydrogen peroxide (H 2 O 2 ) at 75 °C for 10 minutes. Caution is required because the mixture is harmful, and it is recommended that the hydrogen peroxide is added last so as to minimise any reaction side effects. Next, the wafers are placed in a solution of industrial grade detergent and subjected to ultrasonic agitation at 60 °C for ten minutes. Following a rinse in deionised water, the wafers are placed in a circulating deionised water bath for 30 minutes. The wafers are then dried using compressed filtered nitrogen and stored in an appropriate container and environment. 12.2.3 Metallisation A metal layer now needs to be deposited, from which IDT structures are to be formed. In general, aluminum is evaporated using, for example, a Kurt Lesker™ E-beam evaporator. Aluminum is employed because it is commonly used in IC foundries and exhibits chemical resistance to many different liquids 3 . Typically, a 100 to 150 nm layer of aluminum is deposited on the clean surface of a quartz wafer. For example, the beam voltage of an E-beam evaporator is set to 6 keV during the deposition of 150 nm of aluminum, the pre-evaporation pressure is set at 10 -6 torr, and the beam current is set to almost 100 mA. This gives an evaporation rate of 0.2 nm/s. It is to be noted that aluminum could have also been evaporated onto the ' Caution needs to be exercised since trichloroethylene fumes are toxic. 3 Clearly, strong acids attack aluminum and should be avoided. 350 IDT MICROSENSOR FABRICATION device using thermal evaporation instead of using the E-beam technique. The E-beam technique, however, allows more control over the deposition rate, and the films tend to be more uniform and to possess fewer stacking faults and dislocations. E-beam evaporation of aluminum is, indeed, compatible with both the etching and the lift-off processes used later on. 12.2.4 Photolithography The photolithography process is conducted in a clean room environment at a constant temperature of, typically, 25 °C ± 1 °C and at a relative humidity of 40 ± 5 percent. The IDT structures need to be oriented correctly with respect to the quartz wafer in order to generate the required Rayleigh (or Love) waves. Figure 12.3 shows the correct orientation of the wafer and the SAW-IDTs 4 . 12.2.4.1 Etching process The etching process begins with the initial cleaning of the metallised wafers, followed by the deposition of a positive photoresist. The wafers are first rinsed in a bath of acetone and then in isopropanol to remove any possible loose surface contaminants that could have appeared during storage since the initial wafer-cleaning procedure. Next, the wafer is thoroughly rinsed in a deionised water bath for 5 minutes, followed by an oven bake at 75 °C for 20 minutes. This removes any moisture from the surface of the wafer. Using a Headway Research Inc.® spinner, hexamethyl disilazane (HMDS) is spun on the wafer at 3000 rpm for 60 seconds to improve the adhesion of the resist to the wafers. After allowing the HMDS thin film to sit for 2 minutes, AZ-1512® positive photoresist (Hoechst) is then spun at 3000 rpm for 30 seconds. A photoresist layer, approximately 1.2 n,m thick, is formed. The wafer is then baked in an oven at 90 °C for 30 minutes to Major flat ST-quartz Major flat ST-quartz Figure 12.3 Orientation of an ST-quartz wafer and the SAW-IDT structures to fabricate Love and Rayleigh wave sensors 4 The relationship between wafer flats and crystal orientation is defined in Section 4.2. SAW-IDT MICROSENSOR FABRICATION 351 remove any excess solvents from the photoresist. Then, it is cooled to room temperature for approximately 15 minutes before exposing it to UV light in the mask aligner. A contact mask aligner (Karl Suss MRK-3) is used to align the positive chrome mask plate with the quartz that is wafer-coated with the photoresist. A UV light exposure of 6 seconds is subsequently required. The exposed wafer is then developed in a mixture of (ratio 1:4) AZ–450® developer (Hoechst) and deionised water for 40 seconds. Great care should be taken at this stage because under or overdeveloping the photoresist layer will degrade the fabrication success. It is strongly recommended that an immersion style is adopted, so that the wafer is slowly agitated during the developing process at 10 second intervals, followed by a deionised water rinse and a close inspection using a microscope. This will provide for greater control in the important developing stage of fabrication. A 'soft' post bake is then performed at 75 °C for 10 minutes, which assists in the hardening and formation of sharp features of the photoresist. The wafer is then allowed to cool to room temperature for approximately 15 minutes. At this stage, the IDT pattern should have been successfully transferred to the wafer; if not, the photoresist can be stripped off in acetone and the entire procedure repeated before the etching of the wafer. Chemical wet-etching of the unwanted aluminum is then performed. The aluminum layer is first etched in a solution of a commercial etchant and deionised water (3.25 g of etchant in 50 ml of deionised water) at room temperature for approximately 60 seconds. The etching time is extremely critical because undercutting of the structure walls may occur if prolonged times are employed. It is strongly recommended that etching is performed at 10 second intervals, followed by a deionised water rinse and close inspection with a microscope. The temperatures of the etchant solutions, together with the thickness of the metal layers, are important factors that have a significant influence on the etching times. It is recommended that the etching procedure is inspected for assurance before the processing of valuable quartz wafers. Once the IDT design has been successfully transferred to the metallised wafer via the etching process, the wafer is ready for dicing (Campbell 1996, 1998). The dicing process is described briefly in Section 12.2.5. 12.2.4.2 Lift-off process The lift-off process begins with an initial cleaning of the wafers, followed by the deposition of a positive photoresist. A similar cleaning procedure to that used for the etching process is used to remove any possible loose surface contaminants that may have appeared during storage since the initial wafer-cleaning procedure. Similarly, HMDS is spun on to the wafer using, for example, a Headway Research Inc.® spinner at 3000 rpm for 60 seconds to improve the adhesion of the resist to the wafer. After allowing the HMDS thin film to sit for 2 minutes, AZ-1512® positive photoresist (Hoechst) is then spun at 3000 rpm for 30 seconds. A photoresist layer of approximately 1.2 um is formed. The wafers are then baked in an oven at 75 °C for 30 minutes to remove any excess solvents from the photoresist. The wafers are cooled to room temperature for approximately 15 minutes before UV light exposure. After aligning the negative IDT chrome mask plate with the photoresist-coated wafer having a similar orientation to that used in the etching process, the wafer is exposed to 352 IDT MICROSENSOR FABRICATION UV light for 6 seconds. To improve the lift-off capability, the wafer is then immersed in a chlorobenzene bath at room temperature for 3 to 3.5 minutes. It is important to note that this time varies depending on the intensity of the UV exposure lamp; typically, for an intensity of 21 W/cm 2 , the characteristic time in chlorobenzene ranges from about 220 to 280 seconds. This is an extremely critical step, and the procedure should be validated before it is applied to the set of SAW wafers. Chlorobenzene modifies the surface of the photoresist by developing a characteristic 'lip' in the developed pattern. This creates a discontinuity at the edges of the patterned photoresist when a metal is evaporated on the surface of the wafer; thus, unwanted metal is subsequently removed more easily. The wafer is then baked in an oven at 75 °C for 30 minutes to remove any excess solvents from the photoresist and allowed to cool to room temperature for approximately 15 minutes. The wafer is then developed in a mixture (ratio 1:4) of AZ-450® developer (Hoechst) and deionised water for 40 seconds. Again, great care should be taken at this stage, as under or overdeveloping the photore- sist layer will degrade the fabrication success. As in the etching process, an immersion method is strongly recommended, whereby the wafer is slowly agitated during the devel- oping process at 10 second intervals, followed by a deionised water rinse and then close inspection with a microscope. It is important to prevent damage to the photoresist- patterned structures at this stage, so extremely gentle agitation is required in the immersion step, and the use of compressed filtered nitrogen for drying the wafer should be avoided. Close inspection of the wafer surface using an optical microscope is then performed to examine the transferred SAW-IDT pattern. The edges of the photoresist patterns should be well defined and sharp to facilitate the lift-off process. Again, if found unacceptable, the photoresist can be removed using acetone and the entire procedure can be repeated before the metallisation of the wafer. After the metallisation of the photoresist-patterned wafer using the metal evaporation technique (Section 12.2.4), the photoresist is removed by immersing the wafers in an acetone bath at room temperature for 30 minutes. Ultrasonic agitation may be used to assist in the removal process but caution is advised as damage to small patterned structures (feature sizes <2 nm) may occur. Once the IDT designs have been successfully transferred to the wafers via the lift-off process, the wafers are then ready for dicing (Section 12.2.5). A summary of the photolithography process for both the etching and lift-off procedures is shown in Figure 12.4. 12.2.5 Wafer Dicing The wafers are finally cut into small, individual chips using, for example, a Deckel™ wire saw, together with a diamond impregnated wire and slurry. The slurry is made from a mixture of silicon, glycerol, and deionised water (3:5:1) and has a particle size of 25 um. Before cutting the wafer, a thick layer of AZ-4562® positive photoresist (Hoechst) is spun at 2000 rpm for 30 seconds, following the deposition of a thin HMDS layer spun on to improve the photoresist adherence on the wafer. The wafer is then baked in an oven at 75 °C for 30 minutes and then allowed to cool to room temperature. The resulting thick layer protects the delicately patterned IDT structures during the debris cutting. [...]... of IDT, reflectors, and spacings, corresponding transfer matrices can be used in the same order as the actual device layout Figures 13. 3 and 13. 4 show the structures and models of an IDT-IDT pair and a two-port SAW resonator More complex structures of SAW devices can also be modeled by just adding more transfer matrices at appropriate locations The acoustic part and the electrical part of the signals... substituting Equations (13. 6) and (13. 7) into Equation (13. 5) gives an overall transfer matrix of the SAW device in terms of W0'S and W7's for a given input #3, as shown in the following equation: [M] a 3-[ Gi ]-[ D2]'[T3] (13. 8) By applying the appropriate boundary conditions, Equation (13. 8) becomes soluble with two subequations and two unknown parameters Usually, the boundary conditions are W0 = 0 and — W7 = 0... MICROSENSORS + W - W G D T D T D G Figure 13. 4 Schematic representation of a two-port SAW resonator and its transfer matrix model in Figure 13. 4 may be described by = [G, ]-[ D 2 ] [D4] • [T5] • [D6] • [G7] (13. 3) where [T3] and [75] are 2 x 2 acoustic submatrices of a 3 x 3 T matrix, and an overall acoustic matrix [M] (or M) can be defined as [M] = [G1] • [D2] • [T3] • [D4] • T5 • [D6] • [G7] (13. 4) Likewise,... the acoustic part of other SAW devices can also be modeled in a straightforward manner The SAW amplitudes associated with an IDT have an electrical part as an input or output power For example, from Figure 13. 4, (13. 5) where 03 is the scalar input power to IDT 3 and [t3] is a 2 x 1 submatrix of the 3 x 3 T matrix Knowing that r_LMA,i r.uu/^1 (13. 6) and (13. 7) SAW DEVICE MODELING VIA COUPLED-MODE THEORY... University, USA Ghandi, S K (1994) VLSI Fabrication Principles: Silicon and Gallium Arsenide, John Wiley and Sons, New York Hatzakis, M., Canavello, B J and Shaw, J M (1980) "Single-step optical lift-off process," IBM J Res Develop., 24, 45 2-4 60 Itani, T and Fukuyama, F (1997) "Low temperature synthesis of plasma TEOS SiO2," Mat Res Soc Symp., 446, p 255 Vellekoop, M J (1994) A smart Lamb-wave sensor system... SAWs are +W2 and —W1 and +Wo and — W3 and are again zero, provided there are no external SAW sources Outputs b\ and b3 are the resultant electrical signals because of the secondary SAW (Figure 13. 6) Again, different SAW devices can be modeled in similar ways and solved by applying the appropriate boundary conditions m Figure 13. 5 Basic layout of a SAW-IDT gyroscope: a pair of IDTs and a SAW resonator... fit/2)t (13. 9) where COQ is the initial frequency of the FM signal, /JL is 2n times the rate of modulation, and t is time The echoes from the two reflectors, S\(t} and 82(1), are the same as the transmitted signal S(t) but with different amplitudes and time delays t\ and t2, respectively These may be written as Si(0 = A1 cos(w0 + V>t/2)(t - fi) (13. 10) and S2(t) = A2cos(o)0 + l^t/2)(t -t2) (13. 11) with... (13. 11) with + Te (13. 12) + re (13. 13) where v is the SAW velocity, d\ and d2 are the distances from the IDT transducer to the two reflectors, and re is the total of other delays (such as the delay in the electronic circuit and devices and the traveling time of the electromagnetic wave3) that is the same for both echoes Through the mixer that uses the transmitted signal as a reference and low-pass filter,... cos{[a> + u(t - fi)/2](r - t1,) + 00} = A, cos[6>i(r)] (13. 23) where f i = Te + (13. 24) and TI is the time delay corresponding to the surface wave traveling from the transducer to the first reflector and back This delay can be written as T}=2di/v (13. 25) where d\ is the distance between the IDT and the first reflector, i> is the SAW velocity, and Te is the time delay due to the electronic circuit and signal... mechanical strain or environmental temperature The coupled-mode theory of SAW devices helps us to understand the nature of these types of microsensors 13. 2 SAW DEVICE MODELING VIA COUPLED-MODE THEORY The use of coupled-mode theory on SAW devices for different geometric designs and choice of piezoelectric material is clearly described by Pierce (1954) and Campbell (1998) The benefit of this approach is that . Analysis and design aspects of SAW-delay-line-stabilised oscillators, Proceedings of the 2nd Int. Conf. on Frequency Synthesis and Control, London, April 10 13, pp. 3 6-4 0. Campbell, . the etching and lift-off processes and present their relative merits. 12.2 SAW-IDT MICROSENSOR FABRICATION 12.2.1 Mask Generation SAW-IDT designs are written onto square, low-expansion glass. 30 minutes to Major flat ST-quartz Major flat ST-quartz Figure 12.3 Orientation of an ST-quartz wafer and the SAW-IDT structures to fabricate Love and Rayleigh wave sensors 4